Flux rate unit cell focal plane array

A method of detecting an image, the method comprising:

• generating, with a photodetector, a photo-current in response to receiving optical radiation at the photodetector;
• maintaining, with a first input circuit coupled to the photodetector, charge on a first integration capacitor corresponding to the photo-current received from the photodetector during an integration period;
• maintaining, with a second input circuit coupled to the photodetector, charge on a second integration capacitor corresponding to the photo-current received from the photodetector during the integration period;
• comparing a first integration voltage across the first integration capacitor to a first threshold reference voltage;
• comparing a second integration voltage across the second integration capacitor to a second threshold reference voltage;
• repeatedly incrementing a counter value of a counter over the integration period;
• in response to determining that the first integration voltage is at a certain level in relation to the first threshold reference voltage, providing a first output signal to a register to operate the register to latch the counter value of the counter;
• and
• in response to determining that the second integration voltage is at a certain level in relation to the second threshold reference voltage, providing a second output signal to the register to operate the register to latch the counter value of the counter.

An imaging system comprising:

• a focal plane array including a plurality of unit cells, each unit cell of the plurality including:
• a photodetector configured to generate a photo-current in response to receiving optical radiation;
• a first integration capacitor;
• a second integration capacitor;
• a first input circuit coupled to the photodetector and to the first integration capacitor, the first input circuit configured to maintain charge on the first integration capacitor corresponding to the photo-current received from the photodetector during an integration period;
• a second input circuit coupled to the photodetector and to the second integration capacitor, the second input circuit configured to maintain charge on the second integration capacitor corresponding to the photo-current received from the photodetector during the integration period;
• and
• a comparator coupled to the first integration capacitor and configured to compare an integration voltage across the first integration capacitor to a threshold reference voltage;
• a plurality of registers, each register coupled to the comparator of one of the plurality of unit cells;
• a counter coupled to the register of each unit cell of the plurality of unit cells and configured to repeatedly increment a counter value over the integration period;
• and
• an image processing unit coupled to the register of each unit cell of the plurality of unit cells;
• wherein in response to determining that the integration voltage is at a certain level in relation to the threshold reference voltage, each comparator is further configured to provide an output signal configured to control the corresponding register to latch the counter value of the counter, and
• wherein the image processing unit is configured to read-out the latched counter value from the register of each unit cell of the plurality of unit cells, normalize each read-out latched counter value to a common time value, and generate a digital image based on each of the normalized counter values.

An imaging system unit cell circuit comprising:

• a photodetector configured to generate a photo-current in response to receiving optical radiation;
• a first integration capacitor;
• a first input circuit coupled to the photodetector and to the first integration capacitor, the first input circuit configured to maintain charge on the integration capacitor corresponding to the photo-current received from the photodetector during an integration period;
• a first comparator coupled to the first integration capacitor and configured to compare a first integration voltage across the first integration capacitor to a first threshold reference voltage;
• a register coupled to the first comparator;
• and
• a counter coupled to the register and configured to repeatedly increment a counter value over the integration period,
• wherein the first input circuit is further configured to remove an amount of charge from the first integration capacitor corresponding to the photo-current received from the photodetector during the integration period,
• wherein in response to determining that the first integration voltage is less than the first threshold reference voltage, the first comparator is further configured to output a first output signal configured to control the register to latch the counter value of the counter;
• and
• wherein in response to receiving the first output signal, the register is configured to latch the counter value of the counter.