Error limiting method, error limiter and digital receiving circuit
AssigneeMStar Semiconductor, Inc.
InventorsCHIA-WEI CHEN, KAI-WEN CHENG, KO-YIN LAI
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Abstract
An error limiting method includes: receiving a first signal and a first error signal, wherein the first error signal is associated with the first signal and a first symbol corresponding to the first signal; calculating a first magnitude value of the first signal; and decreasing an error energy of the first error signal according to the first magnitude value of the first signal to generate a second error signal, and outputting the second error signal to an error feedback circuit.
Claims20
An error limiting method, applied to an error limiter of a digital receiving circuit, the error limiting method comprising:
- receiving a first signal and a first error signal, wherein the first error signal is associated with the first signal and a first symbol corresponding to the first signal;
- calculating a first magnitude value of the first signal;
- and
- adjusting an error energy of the first error signal according to the first magnitude value of the first signal to generate a second error signal;
- wherein, the error limiter outputs the second error signal to an error feedback circuit of the digital receiving circuit.
An error limiter, applied to a digital receiving circuit, the error limiter comprising:
- a magnitude circuit, receiving a first signal, and generating a first magnitude value of the first signal;
- a limiting circuit, coupled to the magnitude circuit, receiving a first error signal and the first magnitude value, adjusting an error energy of the first error signal according to the first magnitude value of the first signal to generate a second error signal, and outputting the second error signal to an error feedback circuit of the digital receiving circuit;
- wherein, the first error signal is associated with the first signal and a first symbol corresponding to the first signal.
A digital receiving circuit, comprising:
- an error feedback circuit, outputting a first signal according to a plurality of coefficients;
- a symbol decision circuit, coupled to the error feedback circuit, outputting a first symbol corresponding to the first signal according to the first signal;
- a subtraction circuit, coupled to the symbol decision circuit, generating a first error signal according to the first signal and the first symbol;
- and
- an error limiter, coupled to the symbol decision circuit, the subtraction circuit and the error feedback circuit, comprising:
- a magnitude circuit, receiving a first signal, and generating a first magnitude value of the first signal;
- and
- a limiting circuit, coupled to the subtraction circuit and the magnitude circuit, receiving the first error and the first magnitude value, adjusting an error energy of the first error signal according to the first magnitude value of the first signal to generate a second error signal, and outputting the second error signal to the error feedback circuit;
- wherein, the error feedback circuit adjusts the plurality of coefficients according to the second error signal.
Dependencies are inferred from the claim text.