Coarse adjustment cell array applied to digitally controlled oscillator and related apparatus

A digitally controlled oscillator, comprising:

• a coarse adjustment cell array, comprising:
• X coarse adjustment cells each comprising a logic cell and W fine adjustment cells, and
• at least one logic cell of a coarse adjustment cell i configured to receive Y coarse adjustment control bits and W fine adjustment control bits and control the W fine adjustment cells, wherein Y is an integer greater than 1, X is an integer greater than 1, and W is an integer greater than 1;
• a coarse adjustment row-column decoder configured to decode an input first control signal and output A coarse adjustment control bits;
• a fine adjustment row-column decoder configured to decode an input second control signal and output B fine adjustment control bits;
• and
• wherein a set formed by the Y coarse adjustment control bits is a subset of a set comprising the A coarse adjustment control bits, and a set comprising the W fine adjustment control bits is a subset of a set comprising the B fine adjustment control bits.

A frequency synthesizer, comprising:

• a digitally controlled oscillator, comprising:
• a coarse adjustment cell array, comprising:
• X coarse adjustment cells each comprising a logic cell and W fine adjustment cells;
• and
• at least one logic cell of a coarse adjustment cell i configured to receive Y coarse adjustment control bits and W fine adjustment control bits and control the W fine adjustment cells, wherein Y is an integer greater than 1, X is an integer greater than 1, and W is an integer greater than 1,
• a coarse adjustment row-column decoder configured to decode a first control signal and output A coarse adjustment control bits,
• a fine adjustment row-column decoder configured to decode a second control signal and output B fine adjustment control bits, and
• wherein a set formed by the Y coarse adjustment control bits is a subset of a set comprising the A coarse adjustment control bits, and a set comprising the W fine adjustment control bits is
• a subset of a set comprising the B fine adjustment control bits;
• and
• a digital logic cell configured to output the first control signal to the coarse adjustment row-column decoder and output the second control signal to the fine adjustment row-column decoder.