Digital synthesizer, communication unit and method therefor

A communication unit having a digital synthesizer comprising:

• a digitally controlled oscillator, DCO;
• a feedback loop;
• a ramp generator configured to generate a signal of frequency control words, FCW, that describes a desired frequency modulated continuous wave;
• and
• a phase comparator configured to compare a phase of the FCW output from the ramp generator and a signal fed back from the DCO via the feedback loop and output a N-bit oscillator control signal;
• wherein the digital synthesizer comprises a gain circuit coupled to a multiplier located between the ramp generator and the DCO and configured to apply a frequency-dependent gain signal to the N-bit oscillator control signal to maintain an open loop gain of the all-digital phase locked loop, ADPLL, and a PLL loop bandwidth that is substantially constant across a frequency modulation bandwidth.

A method for maintaining an open loop gain of an all-digital phase locked loop, ADPLL, as substantially constant across a frequency modulation bandwidth, the method comprising:

• generating a signal of frequency control words, FCW, that describes a desired frequency modulated continuous wave;
• comparing a phase of the FCW signal with a signal fed back from an output of a digital controlled oscillator, DCO, at a phase comparator and outputting a N-bit oscillator control signal from the phase comparator;
• generating a frequency-dependent gain signal based on the FCW;
• and
• applying the frequency-dependent gain signal to the N-bit oscillator control signal.