Power source monitoring circuit, power on reset circuit, and semiconductor device

A semiconductor device, comprising:

• a first block that operates by power supply from a predetermined power source;
• a level shifter that performs level conversion on a signal that is output from the first block;
• a second block that operates by power supply from another power source different from the power source and receives supply of a signal that is obtained by the level conversion;
• and
• a power source monitoring circuit that controls an operation of the level shifter on the basis of a status of the power source and an operation status control signal for controlling an operation status of the second block, the power source monitoring circuit including a current control unit that is provided on a path of a steady-state current and sets a state where the steady-state current is inhibited from flowing in accordance with the operation status control signal.

A power on reset circuit, comprising:

• a counter that performs a count operation on the basis of an input clock signal;
• a reset signal output unit that outputs a reset signal for resetting an outside block, on the basis of a count result by the counter;
• and
• a first power gate switch that controls power supply to the counter in accordance with the reset signal.

A semiconductor device, comprising

• a power on reset circuit including
• a counter that performs a count operation on the basis of an input clock signal,
• a reset signal output unit that outputs a reset signal for resetting an outside block, on the basis of a count result by the counter, and
• a power gate switch that controls power supply to the counter in accordance with the reset signal.