Current Sensing and Control for a Transistor Power Switch

Circuitry, comprising:

• a first field effect transistor having a first source terminal and a first drain terminal, the first source terminal coupled to an input terminal for receiving a power supply and the first drain terminal coupled to a node;
• and
• having a first gate terminal for receiving a first gate control signal;
• a second field effect transistor having a second drain terminal and a second source terminal, the second drain terminal coupled to the node and the second source terminal coupled to an output terminal for supplying a load current to a load, and having a second gate terminal for receiving a second gate control signal;
• a current sensing transistor having a third drain terminal coupled to the node and a third source terminal coupled to output a sense current, the current sensing transistor having a third gate control terminal coupled to the first gate control signal;
• a first current limiting amplifier having a first input coupled to the input terminal and a second input coupled to the node, and outputting the second gate control signal;
• and
• an operational amplifier coupled with a feedback transistor, the operational amplifier having a voltage reference at a first input and a current limit output terminal at a second input, and having an output coupled to the gate terminal of the feedback transistor, the feedback transistor having a current conduction path coupled between the sense current output of the current sensing transistor and the current limit output terminal.

An apparatus, comprising:

• a voltage input terminal for receiving a supply voltage;
• a voltage output terminal for coupling to a load;
• a first power transistor having a first current conduction path coupled between the voltage input terminal and a common node, and having a first gate terminal coupled to a first gate control signal;
• a second power transistor having a second current conduction path coupled between the common node and the voltage output terminal, and having a second gate terminal coupled to a second gate control signal;
• a first current sense transistor having a third current conduction path coupled to the common node and having a third gate terminal coupled to the first gate control signal for outputting a first sense current proportional to a load current flowing from the voltage input terminal to the voltage output terminal;
• a second current sense transistor having a fourth current conduction path coupled to the common node and having a fourth gate terminal coupled to the second gate control signal, and outputting a second sense current proportional to the load current flowing from the output terminal to the input terminal;
• a differential amplifier having a first input terminal and a second input terminal and having an output signal corresponding to a difference between voltages at the first input terminal and the second input terminal;
• and
• a feedback transistor coupled to a monitor resistor at a monitor node, and having a current conduction path coupled to one of the first sense current and the second sense current, and having a gate control terminal coupled to the output of the differential amplifier.