Apparatus and method for fabricating a high density memory array

An apparatus comprising:

• non-orthogonal transistor fins which are non-orthogonal to transistor gates;
• diffusion contacts with non-right angled sides, the diffusion contacts coupled to the non-orthogonal transistor fins;
• first vias;
• and
• at least one memory element coupled to at least one of the diffusion contacts through at least one of the first vias.

A method comprising:

• fabricating non-orthogonal transistor fins on a substrate, the transistor fins being non-orthogonal relative to a plane of the substrate;
• fabricating diffusion contacts with non-right angled sides over the fabricated non-orthogonal transistor fins, wherein the diffusion contacts are coupled to the non-orthogonal transistor fins;
• depositing an etch stop material over the diffusion contacts;
• depositing a dielectric layer over the etch stop material;
• depositing a metallization hard mask layer over the dielectric layer;
• and
• applying a first photoresist over the metallization hard mask layer, wherein the first photoresist is patterned with holes for forming first vias for coupling the at least one of the first vias to a memory element.

A system comprising:

• a processor core;
• a memory coupled to the processor core, the memory including:
• non-orthogonal transistor fins which are non-orthogonal to transistor gates;
• diffusion contacts with non-right angled sides, the diffusion contacts coupled to the non-orthogonal transistor fins;
• first vias;
• and
• at least one memory element coupled to at least one of the diffusion contacts through at least one of the first vias;
• and
• a wireless interface for allowing the processor to communicate with another device.