Flip-chip Light Emitting Diode Chip and Fabrication Method

A fabrication method for a flip-chip light-emitting diode chip, the method comprising:

• 1) proving a growth substrate, and forming an n-type semiconductor layer, an active layer and a p-type semiconductor layer over the substrate in successive;
• 2) forming a transparent medium layer over the p-type semiconductor layer, wherein, an upper surface of the transparent medium layer is provided with a grid-shaped or array-shaped recess region;
• 3) depositing a patterned transparent bonding medium layer over the transparent medium layer, which fills up the recess region of the high-transparency medium layer, and an upper surface of the patterned transparent bonding medium layer is at the same plane with the upper surface of the transparent medium layer;
• 4) providing a transparent substrate, and connecting it to the patterned transparent bonding medium layer and the upper surface of the transparent medium layer via bonding technology;
• 5) removing the growth substrate, and exposing the n-type semiconductor layer;
• 6) etching part of the n-type semiconductor layer and the active layer to expose part of the p-type semiconductor layer;
• and
• 7) fabricating a first electrode over the exposed n-type semiconductor layer;
• and fabricating a second electrode over the exposed p-type semiconductor layer.

A light-emitting system comprising a plurality of flip-chip light-emitting diodes, wherein each flip-chip light-emitting diode further comprises:

• an epitaxial laminated layer, with an upper surface and a lower surface opposite to each other, further comprises:
• an n-type semiconductor layer;
• an active layer;
• and
• a p-type semiconductor layer;
• wherein, part of the n-type semiconductor layer and the active layer are etched to expose part of the p-type semiconductor layer;
• a first electrode and a second electrode over the lower surface of the epitaxial laminated layer, wherein, the first electrode is over a surface of the n-type semiconductor layer, and the second electrode is over a surface of the exposed p-type semiconductor layer;
• a transparent medium layer over the upper surface of the epitaxial laminated layer, wherein, the upper surface is provided with a grid-shaped or array-shaped recess region;
• a patterned transparent bonding medium layer, which fills up the recess region of the transparent medium layer, and an upper surface is at the same plane with an upper surface of the transparent medium layer;
• and
• a transparent substrate that connects the patterned transparent bonding medium layer to the upper surface of the transparent medium layer.