Thick fdsoi source-drain improvement
AssigneeGlobalfoundries Inc.
InventorsMarcel Richter, Ardechir Pakfar, Armin Muehlhoff
Life of this patent
Estimating the term…
Abstract
A method of forming a semiconductor device is disclosed including providing a semiconductor-on-insulator substrate comprising a semiconductor bulk substrate, a buried insulating layer positioned on the semiconductor bulk substrate and a semiconductor layer positioned on the buried insulating layer, providing at least one metal-oxide semiconductor gate structure positioned above the semiconductor layer comprising a gate electrode and a spacer formed adjacent to the gate electrode, selectively removing an upper portion of the semiconductor layer so as to define recessed portions of the semiconductor layer and epitaxially forming raised source/drain regions on the recessed portions of the semiconductor layer.
Claims22
A method of forming a semiconductor device, comprising:
- providing a semiconductor-on-insulator substrate comprising a semiconductor bulk substrate, a buried insulating layer positioned on said semiconductor bulk substrate and a semiconductor layer positioned on said buried insulating layer, said semiconductor layer having an initial thickness;
- forming at least one metal-oxide semiconductor gate structure above said semiconductor layer comprising a gate electrode and a spacer formed adjacent to said gate electrode;
- selectively removing an upper portion of said semiconductor layer so as to thereby define recessed portions of said semiconductor layer;
- epitaxially forming raised source/drain regions on said recessed portions of said semiconductor layer;
- and
- performing an annealing step so as to cause out-diffusion of dopant ions in said raised source/drain regions into said semiconductor layer to define doped semiconductor regions in portions of said semiconductor layer disposed beneath said raised source/drain regions, said doped semiconductor regions directly contacting said raised source/drain regions and said buried insulating layer.
(canceled)
-18. (canceled)
A method of forming a semiconductor device, comprising:
- providing a semiconductor-on-insulator substrate comprising a semiconductor bulk substrate, a buried insulating layer positioned on said semiconductor bulk substrate and a semiconductor layer positioned on said buried insulating layer, said semiconductor layer having an initial thickness;
- forming at least one metal-oxide semiconductor gate structure above said semiconductor layer comprising a gate electrode and a spacer formed adjacent to said gate electrode;
- selectively removing an upper portion of said semiconductor layer so as to thereby define recessed portions of said semiconductor layer;
- epitaxially forming raised source/drain regions on said recessed portions of said semiconductor layer;
- implanting dopant ions into said raised source/drain regions;
- and
- performing an annealing step so as to cause out-diffusion of said implanted dopant ions in said raised source/drain regions into said semiconductor layer to define doped semiconductor regions in portions of said semiconductor layer disposed beneath said raised source/drain regions, said doped semiconductor regions directly contacting said raised source/drain regions and said buried insulating layer.
Dependencies are inferred from the claim text.