Method of fabricating air-gap spacer for n7/n5 finfet and beyond

A method of forming a transistor device, comprising:

• forming a three-dimensional fin structure on a substrate, the three-dimensional fin structure comprising a top surface and two opposing sidewalls;
• forming a first insulating layer conformally on the top surface and the two opposing sidewalls of the three-dimensional fin structure;
• forming a sacrificial spacer layer conformally on the first insulating layer, wherein the sacrificial spacer layer comprises an aluminum oxide based material or a titanium nitride based material;
• subjecting the sacrificial spacer layer to a directional etch process to expose the first insulating layer at the top surface of the three-dimensional fin structure;
• forming a second insulating layer conformally on the first insulating layer at the top surface of the three-dimensional fin structure and the sacrificial spacer layer on the two opposing sidewalls of the three-dimensional fin structure;
• exposing a top portion of the sacrificial spacer layer on the two opposing sidewalls of the three-dimensional fin structure;
• and
• selectively removing the sacrificial spacer layer to create an air gap spacer between the first insulating layer and the second insulating layer.

A method of forming a transistor device in a processing chamber, comprising:

• forming a three-dimensional fin structure on a substrate, the three-dimensional fin structure comprising a top surface and two opposing sidewalls;
• forming a sacrificial spacer layer between a first insulating layer and a second insulating layer, wherein the first insulating layer is conformally formed on the top surface and the two opposing sidewalls of the three-dimensional fin structure, wherein the sacrificial spacer layer comprises an aluminum oxide based material or a titanium nitride based material;
• exposing the first insulating layer at the top surface of the three-dimensional fin structure by selectively removing the sacrificial spacer layer with an inductively coupled plasma, wherein selectively removing the sacrificial spacer layer is performed by flowing argon (Ar) into a plasma chamber at a first volumetric flowrate and flowing boron trichloride (BCl3) into the plasma chamber at a second volumetric flowrate, and a ratio of the first volumetric flowrate to the second volumetric flowrate is about 1:10 or above and applying a bias power to a substrate support on which the substrate is disposed at about 0.028 W/cm2 to about 0.056 W/cm2;
• and
• removing the sacrificial spacer layer to create an air gap spacer between the first insulating layer and the second insulating layer by immersing the substrate in an aqueous solution obtained by mixing sulfuric acid and a hydrogen peroxide solution in a volume ratio of about 4:1, and the air gap spacer has a thickness of about 4 nm or above.

A method of forming a transistor device, comprising:

• forming a dielectric layer over a substrate;
• forming a plurality of three-dimensional fins from a surface of the substrate, the plurality of three-dimensional fins extending vertically through the dielectric layer and above a top surface of the dielectric layer, each three-dimensional fin comprising a top surface and two opposing sidewalls;
• forming a first insulating layer on the top surface and the two opposing sidewalls of the three-dimensional fin;
• forming a sacrificial spacer layer on the first insulating layer;
• subjecting the sacrificial spacer layer to a directional etch process to expose the first insulating layer at the top surface of the three-dimensional fin;
• forming a second insulating layer on the first insulating layer at the top surface of the three-dimensional fin and the sacrificial spacer layer on the two opposing sidewalls of the three-dimensional fin;
• selectively removing a portion of the second insulating layer to expose a top portion of the sacrificial spacer layer on the two opposing sidewalls of the three-dimensional fin;
• filling trenches between the three-dimensional fin with a gate material;
• performing a planarization process on the substrate until the top surface of the three-dimensional fin and the top portion of the sacrificial spacer layer are exposed;
• and
• selectively removing the sacrificial spacer layer to create an air gap spacer along the two opposing sidewalls of each of the plurality of three-dimensional fins between the first insulating layer and the second insulating layer.