Semiconductor device

A semiconductor device in a chip size package, comprising

• a first metal oxide semiconductor transistor and a second metal oxide semiconductor transistor both vertical transistors respectively formed in a first region and a second region obtained by dividing the semiconductor device into halves,
• wherein the first metal oxide semiconductor transistor includes one or more first gate electrodes and four or more first source electrodes provided in one of major surfaces of the semiconductor device, each of the one or more first gate electrodes is surrounded, in top view, by the four or more first source electrodes among the first source electrodes, and for any combination of one of the one or more first gate electrodes and one of the four or more first source electrodes, closest points between the one of the one or more first gate electrodes and the one of the four or more first source electrodes are on a line inclined with respect to a chip side,
• the second metal oxide semiconductor transistor includes one or more second gate electrodes and four or more second source electrodes provided in the one of major surfaces of the semiconductor device, each of the one or more second gate electrodes is surrounded, in top view, by the four or more second source electrodes among the second source electrodes, and for any combination of one of the one or more second gate electrodes and one of the four or more second source electrodes, closest points between the one of the one or more second gate electrodes and the one of the four or more second source electrodes are on a line inclined with respect to a chip side, and
• a conductor that connects a drain of the first metal oxide semiconductor transistor and a drain of the second metal oxide semiconductor transistor is provided in the other of the major surfaces of the semiconductor device.