Semiconductor device and method of manufacturing the semiconductor device

A method of manufacturing a semiconductor device, the method comprising the steps of:

• (a) providing a semiconductor substrate having a first region and a second region in a top of the semiconductor substrate;
• (b) retracting a part of the top of the semiconductor substrate, thereby forming a plurality of first protrusions in the first region, the first protrusions being part of the semiconductor substrate, protruding from the part of the top of the semiconductor substrate, extending in a first direction along the top of the semiconductor substrate, and arranged in a second direction orthogonal to the first direction, and forming a plurality of second protrusions in the second region, the second protrusions being part of the semiconductor substrate, protruding from the part of the top of the semiconductor substrate, extending in a third direction along the top of the semiconductor substrate, and arranged in a fourth direction orthogonal to the third direction;
• (c) forming a trench in the top of the semiconductor substrate around the second protrusions in the second region;
• (d) forming a first element isolation film that fills between the first protrusions adjacent to each other and has a top located below a top of each of the first protrusions, and a second element isolation film that is embedded in the trench and exposes the top of the semiconductor substrate between the second protrusions adjacent to each other;
• (e) forming a first gate electrode that covers the top and side surfaces of the first protrusion with a first insulating film in between;
• (f) forming a second gate electrode that covers the top and the side surfaces of each of the second protrusions and the top of the semiconductor substrate between the second protrusions adjacent to each other with a second insulating film in between;
• and
• (g) forming a first source region and a first drain region in a surface of the first protrusion, and forming a second source region and a second drain region in the surface of each of the second protrusions and in the top of the semiconductor substrate between the second protrusions adjacent to each other;
• wherein the first gate electrode, the first source region, and the first drain region configure a first field effect transistor, and the second gate electrode, the second source region, and the second drain region configure a second field effect transistor.