Vertical channel semiconductor device with a reduced saturation voltage

A vertical channel semiconductor device comprising:

• a semiconductor body including a substrate having a first conductivity type and a front layer having a second conductivity type;
• first and second trenches extending within the semiconductor body, the first and second trenches laterally delimiting opposite sides of a first semiconductor region of the semiconductor body and laterally delimiting opposite sides of a second semiconductor region of the semiconductor body, the first semiconductor region having a maximum width greater than a maximum width of the second semiconductor region;
• a first conductive region and a first insulating layer in the first trench, the first insulating layer surrounding the first conductive region and contacting the semiconductor body;
• a second conductive region and a second insulating layer in the second trench, the second insulating layer surrounding the second conductive region and contacting the semiconductor body;
• a first emitter region having the first conductivity type, which extends into the front layer and includes:
• a full portion which extends in said second semiconductor region, between the first and second trenches;
• and
• a first annular emitter portion which extends in said first semiconductor region, in contact with said full portion and with the first and second insulation layers.

An insulated gate bipolar transistor, comprising:

• a semiconductor substrate having a first conductivity type;
• a front semiconductor layer having a second conductivity type on a first side of the substrate;
• a back semiconductor layer having the second conductivity type on a second side of the substrate;
• first and second trenches extending within the front semiconductor layer and the substrate, the first and second trenches laterally delimiting opposite sides of a first semiconductor region of the front semiconductor layer and laterally delimiting opposite sides of a second semiconductor region of the front semiconductor layer, the first semiconductor region having a maximum width greater than a maximum width of the second semiconductor region;
• a first conductive region and a first insulating layer in the first trench, the first insulating layer surrounding the first conductive region and contacting the front semiconductor layer and the substrate;
• a second conductive region and a second insulating layer in the second trench, the second insulating layer surrounding the second conductive region and contacting the front semiconductor layer and the substrate;
• a first emitter region having the first conductivity type, which extends into the front semiconductor layer and includes:
• a full portion which extends in said second semiconductor region between the first and second trenches;
• and
• a first annular emitter portion which extends in said first semiconductor region, in contact with said full portion and with the first and second insulation layers.