Silicon germanium alloy fin with multiple threshold voltages

A method of forming a semiconductor structure, the method comprising:

• providing a silicon germanium alloy fin extending upward from a surface of a substrate, the silicon germanium alloy fin being strained and the substrate is composed of a semiconductor material selected from at least one of silicon, germanium, a III-V compound semiconductor and a II-VI compound semiconductor;
• forming an isolation structure entirely through the silicon germanium alloy fin to provide a first strained silicon germanium alloy fin structure in a first device region and a second strained silicon germanium alloy fin structure in a second device region;
• forming a first gate structure straddling over a portion of the first strained silicon germanium alloy fin structure and a second gate structure straddling over a portion of the second strained silicon germanium alloy fin structure;
• forming a block mask over the first device region;
• removing an entirety of exposed portions of the second strained silicon germanium alloy fin structure utilizing the second gate structure as an etch mask, wherein the remaining portion of the second strained silicon germanium alloy fin structure provides a relaxed silicon germanium alloy fin structure, wherein the trench isolation structure has a topmost surface that is coplanar with a topmost surface of each of the first strained silicon germanium alloy fin structure and the relaxed silicon germanium alloy fin structure, and wherein an entirety of the strained silicon germanium alloy fin structure, as measured from an outermost sidewall to an opposing outermost sidewall, has a first length, and an entirety of the second relaxed silicon germanium alloy fin structure, as measured from an outermost sidewall to an opposing outermost sidewall, has a second length that is less than the first length, wherein the first strained silicon germanium alloy fin structure and the relaxed silicon germanium fin structure are located directly on the semiconductor material of the substrate;
• removing the block mask from the first device region;
• and
• forming a first source/drain structure on sidewall surfaces and a topmost surface of the first strained silicon germanium alloy fin structure and on each side of the first gate structure, and a second source/drain structure on sidewall surfaces of the relaxed silicon germanium alloy fin structure and on each side of the second gate structure, wherein a sidewall of the strained silicon germanium alloy fin structure contacts a first sidewall of the isolation structure and a sidewall of the second source/drain structure contacts a second sidewall of the isolation structure.

A semiconductor structure comprising:

• a strained silicon germanium alloy fin structure located in one device region of a substrate and a relaxed silicon germanium alloy fin structure located in another device region of the substrate, wherein an entirety of the strained silicon germanium alloy fin structure, as measured from an outermost sidewall to an opposing outermost sidewall, has a first length, and an entirety of the second relaxed silicon germanium alloy fin structure, as measured from an outermost sidewall to an opposing outermost sidewall, has a second length that is less than the first length, wherein the strained silicon germanium alloy fin structure and the relaxed silicon germanium fin structure are located directly on a semiconductor material of the substrate, wherein the semiconductor material of the substrate is selected from at least one of silicon., germanium, a III-V compound semiconductor and a II-VI compound semiconductor;
• a first functional gate structure straddling over a portion of the strained silicon germanium alloy fin structure;
• a second functional gate structure straddling over a portion of the relaxed silicon germanium alloy fin structure;
• a first source/drain structure located on each side of the first functional gate structure and present on sidewall surfaces and a topmost surface of the strained silicon germanium alloy fin structure;
• a second source/drain structure located on each side of the second functional gate structure and present only on sidewall surfaces of the relaxed silicon germanium alloy fin structure;
• and
• a gate spacer located at least on sidewall surfaces and a topmost surface of the first and second functional gate structures, wherein the strained silicon germanium alloy fin structure extends beyond an outermost sidewall surface of the gate spacer located on the sidewall surfaces of the first functional gate structure, and wherein the sidewall surfaces of the relaxed silicon germanium alloy fin structure are vertically aligned to the outermost sidewall surfaces of the gate spacer located on the sidewall surfaces of the second functional gate structure.