Method for forming flash memory structure

The method for forming a semiconductor structure as claimed in claim I, further comprising:

• forming a spacer on a sidewall of the memory gate;
• forming an interlayer dielectric layer covering the memory gate and the spacer;
• forming an opening to exposed the memory gate and the spacer;
• and
• forming a contact in the opening.

A method for forming a semiconductor structure, comprising:

• forming a control gate over a substrate;
• forming a dielectric layer covering the control gate;
• forming a conductive layer having a first portion and a second portion over the dielectric layer, wherein the first portion of the conductive layer is separated from the control gate by the dielectric layer;
• forming a capping layer covering the first portion and the second portion of the conductive layer;
• polishing the capping layer and the conductive layer to expose a top surface of the first portion of the conductive layer;
• and
• removing the capping layer and the second portion of the conductive layer.

A method for forming a semiconductor structure, comprising:

• forming a control gate over a substrate;
• forming a dielectric layer over the control gate;
• forming a conductive layer over the dielectric layer, wherein a first portion of the conductive layer is located at a first side of the control gate, a second portion of the conductive layer is located over the control gate, and a third portion of the conductive layer is located at a second side of the control gate opposite to the first side of the control gate;
• forming a capping layer covering the first portion, the second portion, and the third portion of the conductive layer;
• polishing the capping layer and the conductive layer to remove the second portion of the conductive layer and to expose top surfaces of the first portion and the third portion of the conductive layer;
• forming a first oxide layer over the top surface of the first portion of the conductive layer;
• and
• removing the conductive layer not covered by the first oxide layer to form a memory gate.