Memory device and method of fabricating thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYu-Wen Tseng, Tsung-Yu Yang, Chung-Jen Huang
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Abstract
A memory device includes a semiconductor substrate having a cell region and a peripheral region surrounding the cell region and a pair of control gate stacks on the cell region. Each of the control gate stacks includes a storage layer and a control gate on the storage layer. The memory device includes at least one high-κ metal gate stack disposed on the substrate. The high-κ metal gate stack has a metal gate and a high-κ dielectric film wrapping around the metal gate, and a top surface of the control gate is lower than a top surface of the metal gate.
Claims21
A memory device comprising:
- a semiconductor substrate having a cell region and a peripheral region surrounding the cell region;
- a pair of control gate stacks on the cell region, wherein each of the control gate stacks comprises a storage layer and a control gate on the storage layer;
- at least one high-κ metal gate stack disposed on the semiconductor substrate, wherein the high-κ metal gate stack has a metal gate and a high-κ dielectric film wrapping around the metal gate, and a top surface of the control gate is lower than a top surface of the metal gate.
A memory device comprising:
- a semiconductor substrate having a cell region and a peripheral region surrounding the cell region;
- a pair of control gate stacks on the cell region, wherein each of the control gate stacks comprises a storage layer and a control gate on the storage layer, and the storage layer comprises two oxide layers and a nitride layer, and the nitride layer is interposed in between the two oxide layers;
- and
- at least one high-κ metal gate stack disposed on the semiconductor substrate, wherein the high-κ metal gate stack has a metal gate and a high-κ dielectric film wrapping around the metal gate.
14-20. (canceled)
A memory device comprising:
- a semiconductor substrate having a cell region and a peripheral region surrounding the cell region;
- a pair of control gate stacks in the cell region;
- a first high-κ metal gate stack in the cell region and having a metal gate and a first high-κ dielectric film wrapping around the metal gate;
- and
- a second high-κ metal gate stack in the peripheral region and having a second high-κ dielectric film and a gate oxide between the second high-κ dielectric film and the semiconductor substrate.
Dependencies are inferred from the claim text.