Method to improve the high k quality for finfet

A method of manufacturing a semiconductor device, the method comprising:

• providing a substrate structure including a PMOS region having a first trench and an NMOS region having a second trench, a high-k dielectric layer at a bottom and on sidewalls of the first and second trenches, and a first P-type work function adjustment layer on the high-k dielectric layer;
• forming a first protective layer on the substrate structure and a second protective layer on the first protective layer;
• forming a mask layer on the second protective layer;
• removing a portion of the mask layer on the NMOS region using a first dry etching process to expose a portion of the second protective layer on the NMOS region;
• removing the exposed portion of the second protective layer on the NMOS region to exposed a portion of the first protective layer on the NMOS region;
• removing the mask layer on the PMOS region using a second dry etching process to expose the second protective layer on the PMOS region;
• removing a portion of the first protective layer and a portion of the first P-type work function adjustment layer on the NMOS region;
• and
• removing the second protective layer and the first protective layer on the PMOS region.