Jfet and ldmos transistor formed using deep diffusion regions

A method for forming a power integrated circuit, comprising:

• providing a semiconductor layer of a first conductivity type and being lightly doped;
• forming a first deep well of a second conductivity type in a first portion of the semiconductor layer;
• forming a first body region of the first conductivity type in the first deep well and on a first surface of the semiconductor layer;
• forming source and drain regions of the second conductivity type in the first portion of the semiconductor layer;
• and
• forming a first deep diffusion region in the first deep well under the first body region and in electrical contact with the first body region,
• wherein forming the first deep diffusion region comprises:
• performing a first ion implantation of dopants of the first conductivity type through a first mask defining the first deep diffusion region and using a first implant dose and a first implant energy;
• and
• performing a second ion implantation of dopants of the first conductivity type through the first mask and using a second implant dose and a second implant energy, the second implant energy being greater than the first implant energy.