Forming on-chip metal-insulator-semiconductor capacitor
AssigneeInternational Business Machines Corporation
InventorsZhenxing Bi, Kangguo Cheng, Peng Xu, Chen Zhang
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Abstract
A method is presented for forming a semiconductor structure. The method includes forming a plurality of fins on a first region of the semiconductor substrate, forming a bi-polymer structure, selectively removing the first polymer of the bi-polymer structure and forming deep trenches in the semiconductor substrate resulting in pillars in a second region of the semiconductor structure. The method further includes selectively removing the second polymer of the bi-polymer structure, doping the pillars, and depositing a high-k metal gate (HKMG) over the first and second regions to form the MIS capacitor in the second region of the semiconductor substrate.
Claims20
A semiconductor structure for forming a metal-insulator-semiconductor (MIS) capacitor on a semiconductor substrate, the semiconductor structure comprising:
- a plurality of fins formed over a first region of the semiconductor substrate;
- a bi-polymer structure;
- deep trenches formed in the semiconductor substrate resulting in undoped pillars in a first region and doped pillars in a second region of the semiconductor structure;
- and
- a high-k metal gate (HKMG) deposited over the first and second regions to form the MIS capacitor in the second region of the semiconductor substrate.
A semiconductor structure for forming a metal-insulator-semiconductor (MIS) capacitor on a semiconductor substrate, the semiconductor structure comprising:
- a plurality of fins formed over a first region of the semiconductor substrate;
- a bi-polymer structure formed between the plurality of fins;
- deep trenches formed in the semiconductor substrate resulting in undoped pillars in a first region and doped pillars in a second region of the semiconductor structure;
- a first oxide filling the deep trenches after removal of the bi-polymer structure;
- a bottom spacer formed at least over the undoped pillars in the first region;
- a high-k metal gate (HKMG) deposited over the second region to form the MIS capacitor in the second region of the semiconductor substrate.
Dependencies are inferred from the claim text.