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US 2018/0122792 A1Published application
Vertical transistors with merged active area regions
AssigneeInternational Business Machines Corporation
InventorsBrent A. Anderson, Albert M. Chu, Terence B. Hook, Seong-Dong Kim
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Abstract
A semiconductor device includes a substrate and an active area region forming a bottom source/drain region on the substrate. Vertical transistors are formed on the bottom source/drain region, where the bottom source/drain region is shared between the vertical transistors.
Claims19
A semiconductor device, comprising:
- a substrate;
- an active area region forming a bottom source/drain region on the substrate;
- and
- a plurality of vertical transistors formed on the bottom source/drain region, where the bottom source/drain region is shared between the plurality of vertical transistors.
1 more element
A semiconductor device, comprising:
- a substrate;
- an active area region forming a bottom source/drain region on the substrate;
- and
- a plurality of vertical transistors formed on the bottom source/drain region, where the bottom source/drain region is shared between the plurality of vertical transistors;
- the vertical transistors including:
- a vertical channel;
- a gate dielectric layer formed about the vertical channel;
- a gate conductor formed about the gate dielectric;
- and
- a top source/drain region formed on the vertical channel.
7 more elements
Dependencies are inferred from the claim text.