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US 2018/0122789 A1Published application
Semiconductor package and method of manufacturing the semiconductor package
AssigneeSamsung Electronics Co., Ltd.
InventorsTae-Ho KANG, Bo-Seong KIM
Life of this patent
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Abstract
A semiconductor package includes a mold substrate, at least one first semiconductor chip in the mold substrate and including chip pads, wiring bonding pads formed at a first surface of the mold substrate and connected to the chip pads by bonding wires, and a redistribution wiring layer covering the first surface of the mold substrate and including redistribution wirings connected to the wiring bonding wirings.
Claims19
A semiconductor package, comprising:
- a mold substrate;
- at least one first semiconductor chip in the mold substrate, the at least one first semiconductor chip including chip pads;
- wiring bonding pads at a first surface of the mold substrate, the wiring bonding pads connected to the chip pads by bonding wires;
- and
- a redistribution wiring layer covering the first surface of the mold substrate, the redistribution wiring layer including redistribution wirings, the redistribution wirings connected to the wiring bonding pads.
2 more elements
11-30. (canceled)
A semiconductor package, comprising:
- a redistribution wiring layer including redistribution wirings and fan out type landing pads connected to the redistribution wirings;
- at least one first semiconductor chip on the redistribution wiring layer, the at least one first semiconductor chip including a first surface having first chip pads thereon and a second surface facing the redistribution wiring layer;
- wiring bonding pads at a first surface of the redistribution wiring layer, the wire bonding pads connected to corresponding ones of the redistribution wirings;
- and
- bonding wires connecting the first chip pads with wiring bonding pads such that the first chip pads are connected to corresponding ones of the fan out type landing pads on a second surface of the redistribution wiring layer, the second surface of the redistribution wiring layer being opposite to the first surface of the redistribution wiring layer.
2 more elements
Dependencies are inferred from the claim text.