Device comprising a stack of electronic chips
AssigneeSTMicroelectronics (Rousset) SAS
InventorsClement Champeix, Nicolas Borrel
Life of this patent
Estimating the term…
Abstract
A device includes a first chip having a front side and a back side. A second chip is stacked with the first chip and located on the back side of the first chip. A first loop includes first and second through vias located in the first chip. Each through via has a first end on the front side of the first chip and a second end on the back side of the first chip. The first loop also includes a first track that connects the first ends of the first and second through vias is located in the first chip on the front side thereof and a second track that connects the second ends of the first and second through vias is located in the second chip. A detection circuit can detect an electrical characteristic of the first loop.
Claims23
A device comprising:
- a first chip having a front side and a back side;
- a second chip stacked with the first chip and located on the back side of the first chip;
- a first loop comprising:
- first and second through vias located in the first chip, each of the first and second through vias having a first end on the front side of the first chip and a second end on the back side of the first chip;
- a first track connecting the first end of the first through via to the first end of the second through via, the first track located at the front side of the first chip;
- and
- a second track connecting the second end of the first through via to the second end of the second through via, the second track located in the second chip;
- and
- a detection circuit coupled to the first loop and configured to detect an electrical characteristic of the first loop.
The device of claim ii, wherein the electrical characteristic of the first and second loops is an electric continuity between the first loop and the second loop, or a difference between an electric resistance of the first loop and that of the second loop.
A device comprising:
- a first chip having a front side and a back side;
- a second chip stacked with the first chip and located on the back side of the first chip;
- a first through via extending from the front side to the back side of the first chip, the first through via having a first end at the front side and a second end at the back side of the first chip;
- a second through via extending from the front side to the back side of the first chip, the second through via having a first end at the front side and a second end at the back side of the first chip;
- a first track located at the front side of the first chip, the first track electrically connecting the first end of the first through via to the first end of the second through via;
- a second track located at a side of the second chip, the second track electrically connecting the second end of the first to the second end of the second through via;
- and
- a detection circuit located in the first chip and electrically coupled to the first track.
A method of protecting a first chip in a multi-chip stack, the method comprising:
- determining an electrical characteristic of a conductive loop that extends over a top portion of the first chip, through the first chip and within a top portion of a second chip that is adjacent a bottom portion of the first chip;
- and
- determining whether the electrical characteristic indicates that an attack is being made to determine contents or operation of the first chip.
Dependencies are inferred from the claim text.