Semiconductor package structure and method of manufacturing the same

A semiconductor package structure, comprising:

• a first chip having a first surface and a second surface opposite the first surface;
• a supporter surrounding an edge of the first chip;
• a conductive layer disposed over the first surface of the first chip and electrically connected to the first chip;
• an insulation layer disposed over the conductive layer, wherein the insulation layer includes a first portion and a second portion connected to the first portion, the first portion overlaps the first chip in a vertical projection direction, the second portion overlaps the supporter in the vertical projection direction, and the first portion and the second portion are disposed at different horizontal levels;
• and
• an encapsulant between the first chip and the supporter and surrounding at least the edge of the first chip.

A semiconductor package structure, comprising:

• a first chip having a first surface and a second surface opposite the first surface;
• a supporter surrounding an edge of the first chip;
• a conductive layer disposed over the first surface of the first chip and electrically connected to the first chip;
• an insulation layer disposed over the first surface of the first chip;
• an encapsulant between the first chip and the supporter and surrounding at least the edge of the first chip;
• and
• a first conductor between the first surface of the first chip and the conductive layer, wherein the first chip and the conductive layer are electrically connected through the first conductor.