Package with vertically spaced partially encapsulated contact structures

A power package, comprising:

• a plurality of semiconductor power chips;
• an encapsulant encapsulating at least part of each of the plurality of semiconductor power chips;
• a first electrically conductive contact structure extending partially within and partially outside of the encapsulant and being electrically coupled with at least one first terminal of at least one of the plurality of semiconductor power chips;
• a second electrically conductive contact structure extending partially within and partially outside of the encapsulant and being electrically coupled with at least one second terminal of at least one of the plurality of semiconductor power chips;
• a first heat removal body thermally coupled to a first main surface of the at least one electronic chip and configured for removing thermal energy from the at least one electronic chip;
• wherein at least a portion of the first electrically conductive contact structure and at least a portion of the second electrically conductive contact structure are vertically spaced and electrically decoupled from one another;
• and
• wherein both the first electrically conductive contact structure and the second electrically conductive contact structure are connected to the first heat removal body.

A method of manufacturing a package, wherein the method comprises:

• encapsulating at least part of at least one electronic chip with an encapsulant;
• providing a first electrically conductive contact structure extending partially within and partially outside of the encapsulant and being electrically coupled with at least one first terminal of at least one of the at least one electronic chip;
• providing a second electrically conductive contact structure extending partially within and partially outside of the encapsulant and being electrically coupled with at least one second terminal of at least one of the at least one electronic chip;
• providing a first heat removal body thermally coupled to a first main surface of the at least one electronic chip and configured for removing thermal energy from the at least one electronic chip;
• spacing at least a portion of the first electrically conductive contact structure and at least a portion of the second electrically conductive contact structure from one another within the encapsulant and in a direction extending between two opposing main surfaces of the package;
• wherein both the first electrically conductive contact structure and the second electrically conductive contact structure are connected to the first heat removal body.

A method of manufacturing a power package, wherein the method comprises:

• encapsulating at least part of each of a plurality of semiconductor power chips by an encapsulant;
• providing a first electrically conductive contact structure extending partially within and partially outside of the encapsulant and being electrically coupled with at least one first terminal of at least one of the plurality of semiconductor power chips;
• providing a second electrically conductive contact structure extending partially within and partially outside of the encapsulant and being electrically coupled with at least one second terminal of at least one of the plurality of semiconductor power chips;
• providing a first heat removal body thermally coupled to a first main surface of the at least one electronic chip and configured for removing thermal energy from the at least one electronic chip;
• electrically decoupling the first electrically conductive contact structure from the second electrically conductive contact structure by vertically spacing at least portions of the first electrically conductive contact structure and the second electrically conductive contact structure within the encapsulant;
• wherein both the first electrically conductive contact structure and the second electrically conductive contact structure are connected to the first heat removal body.