Image tone-reversal with a dielectric using bottom-up cross-linking for back end of line (beol) interconnects
AssigneeIntel Corporation
InventorsRobert L. BRISTOL, James M. BLACKWELL, Rami HOURANI
Life of this patent
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Abstract
Image tone-reversal with a dielectric using bottom-up cross-linking for back end of line (BEOL) interconnects is described. In an example, a semiconductor structure including a metallization layer includes a plurality of trenches in an interlayer dielectric (ILD) layer above a substrate. A pre-catalyst layer is on sidewalls of one or more, but not all, of the plurality of trenches. Cross-linked portions of a dielectric material are proximate the pre-catalyst layer, in the one or more of the plurality of trenches. Conductive structures are in remaining ones of the trenches.
Claims25
A semiconductor structure comprising a metallization layer, the metallization layer comprising:
- a plurality of trenches in an interlayer dielectric (ILD) layer above a substrate;
- a pre-catalyst layer on sidewalls of one or more, but not all, of the plurality of trenches;
- cross-linked portions of a dielectric material proximate the pre-catalyst layer, in the one or more of the plurality of trenches;
- and
- conductive structures in remaining ones of the trenches.
A method of performing tone reversal with a dielectric using bottom-up cross-linking, the method comprising:
- forming a plurality of trenches in an interlayer dielectric (ILD) layer formed above a substrate;
- forming a pre-catalyst layer on exposed portions of the ILD layer, including on sidewalls of one or more, but not all, of the plurality of trenches;
- forming a dielectric material on the pre-catalyst layer;
- cross-linking portions of the dielectric material proximate the pre-catalyst layer;
- and
- forming conductive structures in remaining ones of the plurality of trenches.
A method of fabricating a metallization layer for a semiconductor structure, the method comprising:
- forming a plurality of trenches in an interlayer dielectric (ILD) layer formed above a substrate;
- forming a chemically amplified photoresist in the plurality of trenches;
- removing the chemically amplified photoresist from one or more, but not all, of the plurality of trenches using positive tone processing;
- forming a pre-catalyst layer on exposed portions of the ILD layer, including on sidewalls of the one or more of the plurality of trenches, but not on remaining portions of the chemically amplified photoresist;
- forming a dielectric material above the ILD layer, on the pre-catalyst layer, in the one or more of the plurality of trenches, and above the remaining portions of the chemically amplified photoresist;
- cross-linking portions of the dielectric material proximate the pre-catalyst layer, in the one or more of the plurality of trenches, but not portions of the dielectric layer above the remaining portions of the chemically amplified photoresist;
- removing portions of the dielectric layer that were not cross-linked;
- removing the remaining portions of the chemically amplified photoresist;
- and
- forming conductive structures in trenches formed on the ILD layer formed upon removal of the chemically amplified photoresist.
Dependencies are inferred from the claim text.