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US 2018/0122488 A1Published application
Semiconductor memory device for storing multivalued data
AssigneeToshiba Memory Corporation
InventorsNoboru SHIBATA, Tomoharu Tanaka
Life of this patent
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Abstract
Data storage circuits are connected to the bit lines in a one-to-one correspondence. A write circuit writes the data on a first page into a plurality of 5 first memory cells selected simultaneously by a word line. Thereafter, the write circuit writes the data on a second page into the plurality of first memory cell. Then, the write circuit writes the data on the first and second pages into second memory cells adjoining 10 the first memory cells in the bit line direction.
Claims12
(canceled)
2:
- A semiconductor memory device comprising:
- a memory cell storing n, n is a natural number, bit data;
- a flag cell storing a first data;
- and
- a controller which reads data from the memory cell using a read voltage,
- wherein the controller changes a read level of the read voltage based on a value of the first data.
3 more elements
3:
- The device according to claim 2, wherein
- when the value of the first data is a first value, the read level of the read voltage is set a first read level, and
- when the value of the first data is a second value, the read level of the read voltage is set a second read level.
4:
- The device according to claim 3, wherein
- the second read level is higher than the first read level.
5:
- The device according to claim 3, wherein
- the first data is read from the flag cell by using the read voltage having the first read level.
6:
- The device according to claim 3, wherein
- the value of the first data is changed to the second value from the first value by a write operation.
7:
- The device according to claim 3, wherein
- the memory cell has a first page and a second page, and
- the data read from the memory cell is a data of the first page.
8:
- The device according to claim 2, wherein
- the first data is read from the flag cell by using the read voltage having a first read level,
- when the value of the first data is a first value, a third value is output as the data read from memory cell, and
- when the value of the first data is a second value, the data of the memory cell is read by using the read voltage having a second read level, and the data read from the memory cell is output.
1 more element
9:
- The device according to claim 8, wherein
- the second read level is higher than the first read level.
10:
- The device according to claim 8, wherein
- the value of the first data is changed to the second value from the first value by a write operation.
11:
- The device according to claim 8, wherein
- the memory cell includes a first page and a second page, and
- the data read from the memory cell is a data of the second page.
12:
- The device according to claim 2, wherein
- the flag cell is simultaneously selected with the memory cell.
Dependencies are inferred from the claim text.