Ferroelectric based memory cell with non-volatile retention

An apparatus comprising:

• a first access device controllable by a write word-line (WWL);
• a second access device controllable by a read word-line (RWL);
• and
• a cell comprising ferroelectric material, wherein the cell is coupled to the first and second access devices, and wherein the cell is programmable via the WWL and readable via the RWL.

A method comprising:

• driving a write word-line (WWL), coupled to a gate terminal of a first access transistor, to cause the first access transistor to turn on;
• driving a write bit-line (WBL) coupled to a source/drain terminal of the first access transistor, the driven WBL to charge or discharge a storage node coupled to the first access transistor when the first access transistor is turned on;
• and
• programming a logic state in a ferroelectric cell according to the charged or discharged storage node.

A system comprising:

• a processor;
• a memory coupled to the processor, the memory including:
• a first access device controllable by a write word-line (WWL);
• a second access device controllable by a read word-line (RWL);
• and
• a cell coupled to the first and second access devices, wherein the cell comprises a ferroelectric material, and wherein the cell is programmable via the WWL and readable from via the RWL;
• and
• a wireless interface to allow the processor to communicate with another device.