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US 2018/0122454 A1Published application
Address counting circuit, memory device and operating method thereof
AssigneeSK hynix Inc.
InventorsJae-Seung LEE, Hae-Rang CHOI
Life of this patent
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Abstract
An address counting circuit includes an address counter suitable for counting an address in response to a counting signal; and a counting control block suitable for controlling the address counter to skip the address of at least one predetermined value.
Claims20
An address counting circuit comprising:
- an address counter suitable for counting an address in response to a counting signal;
- and
- a counting control block suitable for controlling the address counter to skip the address of at least one predetermined value.
A memory device comprising:
- a cell array including a plurality of memory cells;
- a refresh counter suitable for counting a refresh address in response to a refresh command, by skipping the refresh address of at least one predetermined value;
- and
- a control block suitable for controlling at least one memory cell corresponding to the refresh address among the plurality of memory cells, to be refreshed in response to the refresh command.
1 more element
A memory device comprising:
- a cell array including a plurality of memory cells;
- a refresh counter suitable for counting a refresh address in response to a refresh command;
- a refresh signal generation block suitable for activating an Internal refresh signal in response to the refresh command, and not activating the internal refresh signal in the case where the refresh address has at least one predetermined value;
- and
- a control block suitable for controlling at least one memory cell corresponding to the refresh address among the plurality of memory cells, to be refreshed in response to the internal refresh signal.
2 more elements
A method for operating a memory device including a plurality of memory cells, comprising:
- counting a refresh address in response to a refresh command, by skipping the refresh address of at least one predetermined value;
- refreshing at least one memory cell corresponding to the refresh address among the plurality of memory cells, in response to the refresh command;
- and
- changing the predetermined value when a refresh cycle is performed at least once.
1 more element
Dependencies are inferred from the claim text.