US 2018/0121587 A1 · SIMULATION METHODS AND SYSTEMS FOR PREDICTING SER

Abstract

A soft error rate (SER) associated with a design of a semiconductor circuit may be predicted based on implementing a simulation associated with the design. The simulation may include generating a simulation environment based on information indicating the design, performing a particle strike simulation based on the simulation environment to generate charge deposition information, and calculating a collected charge quantity from the charge deposition information. A determination may be made whether the SER predicted based on the collected charge quantity at least meets a threshold. The design may be modified, and the simulation repeated, if the predicted SER value meets a threshold value. A semiconductor circuit may be manufactured based on the design if the predicted SER value is less than the threshold value.

Claims21

Dependent claims

A method comprising:

receiving layout and netlist information associated with a design of a semiconductor circuit, the semiconductor circuit including a three-dimensional (3D) semiconductor device;
generating a simulation environment based on the layout and netlist information, the simulation environment including a representation of the semiconductor circuit according to the design of the semiconductor circuit;
performing a particle strike simulation based on the simulation environment to generate charge deposition information associated with the design of the semiconductor circuit;
calculating a collected charge quantity associated with the design of the semiconductor circuit based on the charge deposition information;
and
manufacturing the semiconductor circuit based on the calculated collected charge quantity.

3 more elements

Dependencies are inferred from the claim text.

Simulation methods and systems for predicting ser

Life of this patent

Simulation methods and systems for predicting ser

Life of this patent

Abstract

Claims21