Verification support program medium, verification support method, and information processing device

A verification support method in which a processor, coupled to a memory storing;

• first correspondence information in which, regarding each region of a plurality of regions delimited based on a level of possibility that a path included in a circuit does not meet timing constraints, region information that represents the region and a range of a value of an item relating to delay of the path in the region are associated with each other, and
• second correspondence information in which, regarding a certain region among the plurality of regions, region information that represents the certain region and countermeasure information that represents a countermeasure against delay of the path whose value of the item corresponds to the certain region are associated with each other,
• executes a process including:
• acquiring a value of the item relating to delay of a path included in a target circuit of verification;
• determining whether or not a region corresponding to the acquired value of the item among the plurality of regions is the certain region with reference to the first correspondence information;
• and
• outputting the countermeasure information associated with the region information that represents the certain information with reference to the second correspondence information if determining that the region corresponding to the acquired value of the item is the certain region.

An information processing apparatus comprising:

• a memory configured to store first correspondence information in which, regarding each region of a plurality of regions delimited based on a level of possibility that a path included in a circuit does not meet timing constraints, region information that represents the region and a range of a value of an item relating to delay of the path in the region are associated with each other and second correspondence information in which, regarding a certain region among the plurality of regions, region information that represents the certain region and countermeasure information that represents a countermeasure against delay of the path whose value of the item corresponds to the certain region are associated with each other;
• and
• a processor coupled to the memory and configured to execute a process, the process including;
• acquiring a value of the item relating to delay of a path included in a target circuit of verification,
• determining whether or not a region corresponding to the acquired value of the item among the plurality of regions is the certain region with reference to the first correspondence information, and
• outputting the countermeasure information associated with the region information that represents the certain information with reference to the second correspondence information if determining that the region corresponding to the acquired value of the item is the certain region.