Power Computation Logic
AssigneeSynopsys, Inc.
InventorChing-Ping Chou
Life of this patent
Estimating the term…
Abstract
A computer-aided method for configuring a hardware verification system is presented. The method includes receiving, by the computer, a first data representative of a first design of an integrated circuit, when the computer is invoked to configure the verification system, and transforming, using the computer, the first data into a second data representative of a second design. The second design includes a functionality of the first design, and a first circuit adapted to compute a third data representative of a power consumption of a first portion of the first design when the hardware verification system is configured with the second data and run. The first circuit is programmable without reconfiguring the second design.
Claims50
A computer-aided method for configuring a hardware verification system, the method comprising:
- receiving, by the computer, a first data representative of a first design of an integrated circuit, when the computer is invoked to configure the verification system;
- and
- transforming, using the computer, the first data into a second data representative of a second design that includes:
- a functionality of the first design;
- and
- a first circuit adapted to compute a third data representative of a power consumption of a first portion of the first design when the hardware verification system is configured with the second data and run, wherein the first circuit is programmable without reconfiguring the second design.
A system for configuring a hardware verification system, the system configured to:
- receive a first data representative of a first design of an integrated circuit, when the system is invoked to configure the verification system;
- and
- transform the first data into a second data representative of a second design that includes:
- a functionality of the first design;
- and
- a first circuit adapted to compute a third data representative of a power consumption of a first portion of the first design when the hardware verification system is configured with the second data and run, wherein the first circuit is further adapted to be programmable without reconfiguring the second design.
A computer-aided method for configuring a hardware verification system, the method comprising:
- receiving, by the computer, a first data representative of a first design of an integrated circuit, when the computer is invoked to configure the verification system;
- and
- transforming, using the computer, the first data into a second data representative of a second design that includes:
- a functionality of the first design;
- and
- a first circuit adapted to compute a third data representative of a power consumption of a first portion of the first design when the hardware verification system is configured with the second data and run, wherein the first circuit is further adapted to intermittently transmit the third data when the third data is equal to or larger than a predetermined threshold.
A system for configuring a hardware verification system, the system configured to:
- receive a first data representative of a first design of an integrated circuit, when the system is invoked to configure the verification system;
- and
- transform the first data into a second data representative of a second design that includes:
- a functionality of the first design;
- and
- a first circuit adapted to compute a third data representative of a power consumption of a first portion of the first design when the hardware verification system is configured with the second data and run, wherein the first circuit is further adapted to intermittently transmit the third data when the third data is equal to or larger than a predetermined threshold.
Dependencies are inferred from the claim text.