Throttled data memory access
AssigneeHewlett Packard Enterprise Development LP
InventorsGeoff M. Lyon, Amip J. Shah, Henry Sang, Henri J. Suermondt
Life of this patent
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Abstract
Examples relate to providing throttled data memory access. In some examples, a locking mechanism is used to activate a corresponding memory lock after receiving a first read access cycle. While the corresponding memory lock is active, responses to subsequent read access cycles are prevented. After the corresponding memory lock deactivates, a second read access cycle is responded to with access to the memory.
Claims15
A system comprising:
- a memory to store data for the system;
- a memory controller comprising a locking mechanism, the memory controller to:
- after receiving a first read access cycle, use the locking mechanism to activate a corresponding memory lock;
- while the corresponding memory lock is active, prevent responses to subsequent read access cycles;
- and
- after the corresponding memory lock deactivates, respond to a second read access cycle with access to the memory.
A method for providing throttled data memory access, the method comprising:
- after receiving a first read access cycle, charging a voltage gate to activate a corresponding memory lock;
- while the corresponding memory lock is active, preventing responses to subsequent read access cycles;
- and
- after the voltage gate discharges and the corresponding memory lock deactivates, responding to a second read access cycle with access to the memory.
A non-transitory machine-readable storage medium encoded with instructions executable by a processor for providing throttled data memory access, the machine-readable storage medium comprising instructions to:
- after receiving a first read access cycle, use a locking mechanism to activate a corresponding memory lock;
- while the corresponding memory lock is active, prevent responses to subsequent read access cycles, wherein the corresponding memory lock is active for a preconfigured lock duration that restricts access to a maximum number of read access cycles per second;
- and
- after the corresponding memory lock deactivates, respond to a second read access cycle with access to the memory.
Dependencies are inferred from the claim text.