System, method, and apparatus for reducing redundant writes to memory by early detection and roi-based throttling

A method comprising:

• detecting a write request comprising an address corresponding to a first cache line in a cache;
• responsive to the detection, copying a first data of the first cache line from the cache to a buffer;
• receiving a second data corresponding to the write request and responsively comparing the second data to the first data in the buffer;
• replacing the first data in the buffer with the second data responsive to a determination that the first data in the buffer is different than the second data;
• and
• removing the first data from the buffer responsive to a determination that the first data in the buffer is same as the second data.

A processor coupled to a memory, the processor comprising:

• a plurality of cores;
• at least one shared cache to be shared among two or more of the plurality of cores, wherein a dirty cache line evicted from the cache is written to the memory;
• and
• a redundant write detection circuitry coupled to the cache, the redundant write detection circuitry to control write access to the cache based on a redundancy check of data to be written to the cache.