Light-weight on-chip signal monitor with integrated memory management and data collection
AssigneeFinisar Corporation
InventorsHenry Meyer Daghighian, Lucy G. Hosking, Gilles P. Denoyer
Life of this patent
Estimating the term…
Abstract
Embodiments of a device and method to automatically acquire signal quality metrics in a digital communication system are disclosed. The device may include acquisition means to sample the likelihood of a digital communication signal passing through a grid of time and amplitude regions, and storage means by which such likelihood measurements may be accumulated in a computer memory array for analysis. A state machine may execute a method that controls both the acquisition means and the storage means, requiring minimal intervention from supervisory systems.
Claims22
An on-chip signal monitor comprising:
- a clock and data recovery (CDR) unit that provides a reference clock signal;
- a state machine that includes a sequencing logic, the sequencing logic configured to initiate each sample acquisition and, to trigger an update of at least one of a digitized time value or a digitized amplitude value;
- at least one flip flop connected to the CDR unit and the sequencing logic, the at least one flip flop configured to pass a rising edge of the reference clock signal from the CDR unit to an input of a programmable delay chain responsive to a sample gate signal from the sequencing logic;
- the programmable delay chain that receives the digitized time value and outputs a delayed rising edge of the reference clock signal to a sample capture unit at a time slice window determined by the digitized time value;
- the sample capture unit that, responsive to the delayed rising edge, captures:
- a sample from an input signal within the time slice window and within an amplitude slice window determined by the digitized amplitude value;
- or
- a sample from the input signal if the sample is within the time slice window and within the amplitude slice window determined by the digitized amplitude value;
- an address generator that uses the digitized time value and the digitized amplitude value to form an address of an accumulator register located in a memory;
- and
- a load-increment-store logic that fetches a value of the accumulator register from the address of the memory, increments the value by 1, and stores the incremented value in the address.
An on-chip signal monitor comprising:
- a clock and data recovery (CDR) unit that provides a reference clock signal;
- a state machine that includes a sequencing logic, the sequencing logic configured to initiate each sample acquisition and to trigger an update of a digitized time value;
- at least one flip flop connected to the CDR unit and the sequencing logic, the at least one flip flop configured to pass a rising edge of the reference clock signal from the CDR unit to an input of a programmable delay chain responsive to a sample gate signal from the sequencing logic;
- the programmable delay chain that receives the digitized time value and outputs a delayed rising edge of the reference clock signal to a sample-and-hold circuit at a time slice window determined by the digitized time value;
- a sample capture unit that includes:
- the sample-and-hold circuit that captures and integrates an input signal over the time slice window to output an average voltage of the input signal responsive to the delayed rising edge;
- and
- an analog-to-digital converter (ADC) that receives the average voltage of the input signal at the time slice window and digitizes the average voltage of the input signal to a digitized amplitude value;
- an address generator that uses the digitized time value and the digitized amplitude value to form an address of an accumulator register located in a memory;
- and
- a load-increment-store logic that fetches a value of the accumulator register from the address of the memory, increments the value by 1, and stores the incremented value in the address.
(canceled)
13-16. (canceled)
A method of acquiring samples using an automatic signal monitor, the method comprising:
- setting a sample gate signal to initiate sample acquisition;
- capturing an input signal over a time slice window to output an average voltage of the input signal in the time slice window, wherein the time slice window is determined by a digitized time value stored in a counter;
- digitizing the average voltage of the input signal to a digitized amplitude value;
- forming an address of a memory based on the digitized time value and the digitized amplitude value;
- and
- incrementing a value stored at the address in the memory by 1.
A method of acquiring samples using an automatic signal monitor, the method comprising:
- setting a sample gate signal to initiate sample acquisition;
- capturing a sample within a time slice window determined by a digitized time value and an amplitude slice window determined by a digitized amplitude value, wherein the digitized time value and the digitized amplitude value are stored in a counter;
- generating a sample-in-window signal with a trigger level to trigger an update of a value at an address in a memory, the address determined by the digitized time value and the digitized amplitude value;
- forming the address of the memory based on the digitized time value and the digitized amplitude value;
- and
- incrementing the value stored at the address in the memory by 1.
Dependencies are inferred from the claim text.