Simd channel utilization under divergent control flow
AssigneeIntel Corporation
InventorsGang Chen, Pratik J. Ashar, Subramaniam Maiyuran, Guei-Yuan Lueh
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Abstract
Methods and apparatus relating to techniques for improved SIMD channel utilization in a divergent control flow environment. In an example, an apparatus comprises logic, at least partially comprising hardware logic, to determine instructions in an instruction set which are combinable into a super-instruction to execute in a divergent control flow environment, combine a first instruction and a second instruction to form a super-instruction, encode the super-instruction, and queue the super-instruction for execution on a processor. Other embodiments are also disclosed and claimed.
Claims24
An apparatus comprising:
- logic, at least partially comprising hardware logic, to:
- determine instructions in an instruction set which are combinable into a super-instruction to execute in a divergent control flow environment;
- combine a first instruction and a second instruction to form a super-instruction;
- encode the super-instruction;
- and
- queue the super-instruction for execution on a processor.
One or more computer-readable medium comprising one or more instructions that when executed on at least one processor configure the at least one processor to perform one or more operations to:
- determine instructions in an instruction set which are combinable into a super-instruction to execute in a divergent control flow environment;
- combine a first instruction and a second instruction to form a super-instruction;
- encode the super-instruction;
- and
- queue the super-instruction for execution on a processor.
An electronic device, comprising:
- a processor having one or more processor cores;
- and
- logic, at least partially comprising hardware logic, to:
- determine instructions in an instruction set which are combinable into a super-instruction to execute in a divergent control flow environment;
- combine a first instruction and a second instruction to form a super-instruction;
- encode the super-instruction;
- and
- queue the super-instruction for execution on a processor.
A method comprising:
- determining instructions in an instruction set which are combinable into a super-instruction to execute in a divergent control flow environment;
- combining a first instruction and a second instruction to form a super-instruction;
- encoding the super-instruction;
- and
- queuing the super-instruction for execution on a processor.
Dependencies are inferred from the claim text.