Fused Multiply-Add that Accepts Sources at a First Precision and Generates Results at a Second Precision

A processor comprising:

• a vector execution unit configured to execute a first vector floating point instruction operation that specifies a first vector source operand and a second vector source operand, wherein:
• the first vector source operand and the second vector source operand are single precision floating point vectors;
• the vector execution unit is configured to perform a multiply-add operation on the first source vector operand and the second source vector operand at an extended precision;
• the multiply-add operation includes multiplying respective vector elements of the first vector operand and the second vector operand and adding multiplication results from adjacent vector element positions at the extended precision to generate result vector elements;
• and
• the vector execution unit generating a result vector with the result vector elements at a double precision.

A processor comprising:

• a vector execution unit configured to execute a first vector floating point instruction operation that specifies a first vector source operand and a second vector source operand, wherein:
• the first vector source operand and the second vector source operand are single precision floating point vectors;
• the vector execution unit is configured to perform a multiply-add operation on the first source vector operand and the second source vector operand at an extended precision;
• the multiply-add operation includes multiplying respective vector elements of the first vector operand and the second vector operand at the extended precision and adding multiplication results from adjacent vector element positions at the extended precision to generate result vector elements at the extended precision;
• and
• the vector execution unit generating a result vector with the result vector elements at a double precision.