Software stack and programming for dpu operations

A system, comprising:

• at least one dynamic random access memory (DRAM) processing unit (DPU), each DPU comprising:
• at least one computing cell array comprising a plurality of DRAM-based computing cells arranged in an array having at least one column, the at least one column comprising at least three rows of DRAM-based computing cells configured to provide a logic function that operates on a first row and a second row of the at least three rows and configured to store a result of the logic function in a third row of the at least three rows;
• and
• a plurality of DRAM-based stochastic computing cells arranged in an array having at least one column, the at least one column comprising at least three rows of DRAM-based stochastic computing cells configured to provide a stochastic logic function that operates on a first row and a second row of the at least three rows and configured to store a result of the stochastic logic function in a third row of the at least three rows;
• an interface to receive a command;
• a library to determine at least one DPU operation corresponding to the received command;
• and
• a driver to send the at least one DPU instruction corresponding to the received command to the at least one DPU.

A system, comprising:

• at least one dynamic random access memory (DRAM) processing unit (DPU) comprising at least one stochastic computing cell array comprising a plurality of DRAM-based stochastic computing cells arranged in an array having at least one column, the at least one column comprising at least three rows of DRAM-based stochastic computing cells configured to provide a stochastic logic function that operates on a first row and a second row of the at least three rows and configured to store a result of the stochastic logic function in a third row of the at least three rows;
• a library to determine at least one stochastic DPU operation corresponding to a received command;
• and
• a driver to send the at least one stochastic DPU instruction corresponding to the received command to the at least one DPU comprising the plurality of DRAM-based stochastic computing cells.