Semiconductor memory device and operating method thereof

A semiconductor memory device comprising:

• a memory cell array to which a plurality of word lines are coupled;
• a voltage generation circuit configured to apply operating voltages to the plurality of word lines during a program operation;
• and
• a control logic configured to control the voltage generation circuit to perform a discharge operation for the plurality of word lines when an external power supply voltage is reduced during the program operation,
• wherein the control logic controls the voltage generation circuit such that, during the discharge operation, a potential level of a selected word line among the plurality of word lines is discharged to a potential level of the other unselected word lines, and then the potential levels of all of the word lines are discharged to a ground level.

An operating method of a semiconductor memory device, comprising:

• generating a plurality of operating voltages in response to a command inputted from an outside;
• applying the plurality of operating voltages to a selected word line and unselected word lines of a memory cell array, and performing a program operation;
• and
• discharging potential levels of the selected word line and the unselected word lines when an external power supply voltage is reduced during the program operation,
• wherein a discharge period of the selected word line and a discharge period of the unselected word lines differ from each other.