# US 2018/0027667 A1 · Circuit carrier and a method for producing a circuit carrier > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2018/0027667 A1 - Document ID: US20180027667A1 - Status: Published application - Kind: A1 - Application number: 15/550,086 - Filed: 2015-12-21 - Published: 2018-01-25 - Earliest claimed: 2015-02-13 - Assignees: Robert Bosch GmbH - Applicants: Robert Bosch GmbH - Inventors: Harun Bueyuekgoez; Roland Gerstner; Josef Weber - Web page: https://patentgrep.com/patent/US20180027667A1 ## CPC - H05K 3/4629: {laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets} - H05K 1/0206: {by printed thermal vias} - H05K 1/115: {Via connections; Lands around holes or via connections (H05K1/112 takes precedence)} - H05K 3/4046: {using auxiliary conductive elements, e.g. metallic spheres, eyelets, pieces of wire} - H05K 1/0204: {using means for thermal conduction connection in the thickness direction of the substrate (H05K1/0207 takes precedence)} - H05K 2201/0376: Flush conductors, i.e. flush with the surface of the printed circuit - H05K 2201/10416: Metallic blocks or heatsinks completely inserted in a PCB - H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ## Abstract The invention relates to a circuit carrier (1) comprising a plurality of inorganic substrate layers (1.1) that have partial metallisations (1.2, 1.3, 1.4, 1.5, 1.6) for the purpose of electrical and/or thermal conduction, and to a corresponding method for producing such a circuit carrier (1). According to the invention, at least one partial metallisation is made in the form of an insert (1.2) that fills a corresponding shaped hole (1.7) introduced into one of said inorganic substrate layers (1.1). ## Claims ### Claim 1 A circuit carrier (1, 1A) having a plurality of inorganic substrate layers (1.1) that have partial metallizations (1.2, 1.3, 1.4, 1.5, 1.6) for electrical and/or thermal conduction, characterized in that at least one of the partial metallizations is configured as an inserted part (1.2) which fills a corresponding shaped hole (1.7) that is introduced into one of the inorganic substrate layers (1.1). ### Claim 2 (depends on 1) The circuit carrier as claimed in claim 1, characterized in that a thickness of the one of the partial metallizations configured as an inserted part (1.2) corresponds to a thickness of the corresponding inorganic substrate layer (11). ### Claim 3 (depends on 1) The circuit carrier as claimed in claim 1, characterized in that the inserted part (1.2) consists of a metal and/or a metal alloy, preferably copper and/or a copper alloy. ### Claim 4 (depends on 1) The circuit carrier as claimed in claim 1, characterized in that the one of the partial metallizations configured as an inserted part (1.2) is used as an outer contacting (AK) and/or as a power contacting (LK) and/or as a heavy current line. ### Claim 5 (depends on 1) The circuit carrier as claimed in claim 1, characterized in that at least one further partial metallization is configured as a surface metallization that is arranged on an upper side and/or lower side of one of the inorganic substrate layers (1.1). ### Claim 6 (depends on 5) The circuit carrier as claimed in claim 5, characterized in that the surface metallization is configured as an upper side metallization (1.3) and/or as a lower side metallization (14) and/or as an inner layer metallization (1.5) of the circuit carrier (1, 1A). ### Claim 7 (depends on 1) The circuit carrier as claimed in claim 1, characterized in that metallizations (1.2, 1.3, 1.4, 1.5) formed on different inorganic substrate layers (1.1) are electrically and/or thermally connected to one another by at least one through-contact (1.6). ### Claim 8 (depends on 1) A method for producing a circuit carrier (1, 1A) having a plurality of inorganic substrate layers (1.1) as claimed in claim 1, the method comprising in order to produce one of the inorganic substrate layers (11), introducing at least one shaped hole (1.7) for a corresponding inserted part (1.2) into an unfired raw material layer (1.9), and inserting the inserted part (1.2) into the shaped hole (1.7), and firing the raw material layer (1.9) with the inserted part (1.2) in a thermal process to form the inorganic substrate layer (11). ### Claim 9 (depends on 8) The method as claimed in claim 8, characterized in that the raw material layer (1.9) is configured to be higher than the inserted part (1.2), wherein the shaped hole (1.7) is filled up after the insertion of the inserted part (1.2) with a filler material (1.8) which is vaporized while the thermal process is being carried out. ### Claim 10 (depends on 9) The method as claimed in claim 9, characterized in that the thermal process is a constraint sintering process in which material shrinkage is essentially restricted to the thickness of the raw material layer (1.9), so that the inorganic substrate layer (1.1) is thinner than the material layer (1.9). ### Claim 11 (depends on 1) The circuit carrier as claimed in claim 1, characterized in that the inserted part (1.2) consists of copper and/or a copper alloy.