# US 2018/0026648 A1 · Time-Based Delay Line Analog Comparator > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2018/0026648 A1 - Document ID: US20180026648A1 - Status: Published application - Kind: A1 - Application number: 15/652,710 - Filed: 2017-07-18 - Published: 2018-01-25 - Earliest claimed: 2016-07-19 - Assignees: Microchip Technology Incorporated - Applicants: Microchip Technology Incorporated - Inventors: Bryan Kris; Jim Bartling; Neil Deutscher - Web page: https://patentgrep.com/patent/US20180026648A1 ## CPC - H03M 1/502: {using tapped delay lines} - H03K 5/14: by the use of delay lines (H03K5/133 takes precedence) - H03K 5/24: the characteristic being amplitude - H03M 1/1205: {Multiplexed conversion systems} - H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C) - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) ## Abstract Embodiments of the present disclosure include voltage comparators. The voltage comparators may include a first input configured to receive a first analog voltage, a second input configured to receive a second analog voltage, a first digital delay line configured to propagate the first analog voltage through a first delay circuit and the second analog voltage through a second circuit, and an output circuit configured to provide a comparator output based upon whether values representing the first analog voltage or the second analog voltage propagated faster through the first digital delay line. The comparator output may be configured to identify whether the first analog voltage or the second analog voltage is greater. ## Claims ### Claim 1 A voltage comparator, comprising: a first input configured to receive a first analog voltage; a second input configured to receive a second analog voltage; a first digital delay line configured to propagate the first analog voltage through a first delay circuit and the second analog voltage through a second circuit; and an output circuit configured to provide a comparator output based upon whether values representing the first analog voltage or the second analog voltage propagated faster through the first digital delay line, the comparator output configured to identify whether the first analog voltage or the second analog voltage is greater. ### Claim 2 (depends on 1) The voltage comparator of claim 1, wherein: the voltage comparator further includes a voltage to current converter circuit; and the first digital delay line is further configured to propagate the first analog voltage and the second analog voltage after the first analog voltage is converted to a first current and the second analog voltage is converted to a second current. ### Claim 3 (depends on 1) The voltage comparator of claim 1, wherein: the voltage comparator further includes a voltage to current converter circuit; the first digital delay line is further configured to propagate the first analog voltage and the second analog voltage after the first analog voltage is converted to a first current and the second analog voltage is converted to a second current; and the output circuit is further configured to provide the comparator output based upon whether the first current or the second current is greater. ### Claim 4 (depends on 1) The voltage comparator of claim 1, wherein: the voltage comparator further includes a voltage to current converter circuit; the first digital delay line is further configured to propagate the first analog voltage and the second analog voltage after the first analog voltage is converted to a first current and the second analog voltage is converted to a second current; and the output circuit is further configured to identify that the first analog voltage is greater than the second analog voltage based on a determination that the first current is greater than the second current. ### Claim 5 (depends on 1) The voltage comparator of claim 1, wherein: the voltage comparator further includes a voltage to current converter circuit; the first digital delay line is further configured to propagate the first analog voltage and the second analog voltage after the first analog voltage is converted to a first current and the second analog voltage is converted to a second current; and the output circuit is further configured to identify that the first analog voltage is greater than the second analog voltage based on a determination that the values representing the first analog voltage propagated through the first digital delay line faster than those of the second analog voltage. ### Claim 6 (depends on 1) The voltage comparator of claim 1 further comprising: a second digital delay line; and a multiplexer; wherein the first and second digital delay lines are configured to alternatively compare analog voltage inputs. ### Claim 7 (depends on 1) The voltage comparator of claim 1, further comprising a thermometer code logic circuit configured to interpret values representing the first analog voltage and the second analog voltage into a comparison identification for the output circuit. ### Claim 8 (depends on 1) The voltage comparator of claim 1, further comprising a transconductor configured to convert an input differential voltage between the first analog voltage and the second analog voltage into a differential current representing the first analog voltage and the second analog voltage. ### Claim 9 (depends on 1) The voltage comparator of claim 1, wherein each differential digital delay line includes a chain of current limited buffers. ### Claim 10 (depends on 1) The voltage comparator of claim 1, wherein: a given differential digital delay line is configured to operate at a speed according to a differential current applied to the given differential digital delay line; the comparator further comprises a latch; and the latch is configured to save data from a slower differential digital delay line upon a completion of faster differential digital delay line. ### Claim 11 A microcontroller, comprising: a plurality of voltage comparators, wherein a first voltage comparator comprises: a first input configured to receive a first analog voltage; a second input configured to receive a second analog voltage; a first digital delay line configured to propagate the first analog voltage through a first delay circuit and the second analog voltage through a second circuit; and an output circuit configured to provide a comparator output based upon whether values representing the first analog voltage or the second analog voltage propagated faster through the first digital delay line, the comparator output configured to identify whether the first analog voltage or the second analog voltage is greater. ### Claim 12 (depends on 11) The microcontroller of claim 11, wherein: the first voltage comparator further includes a voltage to current converter circuit; and the first digital delay line is further configured to propagate the first analog voltage and the second analog voltage after the first analog voltage is converted to a first current and the second analog voltage is converted to a second current. ### Claim 13 (depends on 11) The microcontroller of claim 11, wherein: the first voltage comparator further includes a voltage to current converter circuit; the first digital delay line is further configured to propagate the first analog voltage and the second analog voltage after the first analog voltage is converted to a first current and the second analog voltage is converted to a second current; and the output circuit is further configured to provide the comparator output based upon whether the first current or the second current is greater. ### Claim 14 (depends on 11) The microcontroller of claim 11, wherein: the first voltage comparator further includes a voltage to current converter circuit; the first digital delay line is further configured to propagate the first analog voltage and the second analog voltage after the first analog voltage is converted to a first current and the second analog voltage is converted to a second current; and the output circuit is further configured to identify that the first analog voltage is greater than the second analog voltage based on a determination that the first current is greater than the second current. ### Claim 15 (depends on 11) The microcontroller of claim 11, wherein: the first voltage comparator further includes a voltage to current converter circuit; the first digital delay line is further configured to propagate the first analog voltage and the second analog voltage after the first analog voltage is converted to a first current and the second analog voltage is converted to a second current; and the output circuit is further configured to identify that the first analog voltage is greater than the second analog voltage based on a determination that the values representing the first analog voltage propagated through the first digital delay line faster than those of the second analog voltage. ### Claim 16 (depends on 11) The microcontroller of claim 11, wherein the first voltage comparator further comprises: a second digital delay line; and a multiplexer; wherein the first and second digital delay lines are configured to alternatively compare analog voltage inputs. ### Claim 17 (depends on 11) The microcontroller of claim 11, wherein the first voltage comparator further comprises a thermometer code logic circuit configured to interpret values representing the first analog voltage and the second analog voltage into a comparison identification for the output circuit. ### Claim 18 (depends on 11) The microcontroller of claim 11, wherein the first voltage comparator further comprises a transconductor configured to convert an input differential voltage between the first analog voltage and the second analog voltage into a differential current representing the first analog voltage and the second analog voltage. ### Claim 19 (depends on 11) The microcontroller of claim 11, wherein each differential digital delay line includes a chain of current limited buffers. ### Claim 20 (depends on 11) The microcontroller of claim 11, wherein: a given differential digital delay line is configured to operate at a speed according to a differential current applied to the given differential digital delay line; the first voltage comparator further comprises a latch; and the latch is configured to save data from a slower differential digital delay line upon a completion of faster differential digital delay line.