# US 2018/0026628 A1 · Hybrid switch including gan hemt and mosfet > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2018/0026628 A1 - Document ID: US20180026628A1 - Status: Published application - Kind: A1 - Application number: 15/639,183 - Filed: 2017-06-30 - Published: 2018-01-25 - Earliest claimed: 2016-07-21 - Assignees: Hella KGaA Hueck & Co. - Applicants: HELLA KGaA HUECK & CO. - Inventors: Juncheng Lu; Hua Bai; Hui Teng - Web page: https://patentgrep.com/patent/US20180026628A1 ## CPC - H03K 17/284: in field effect transistor switches - H02M 3/3376: {with automatic control of output voltage or current} - H03K 17/04123: {in field-effect transistor switches} - H03K 17/122: {in field-effect transistor switches} - H03K 17/163: {Soft switching} - H03K 17/602: {in integrated circuits} - H03K 17/6871: {the output circuit comprising more than one controlled field-effect transistor} - H03K 17/6872: {using complementary field-effect transistors} - H10D 30/4755: {having wide bandgap charge-carrier supplying layers, e.g. modulation doped HEMTs such as n-AlGaAs/GaAs HEMTs} - H10D 62/83: being Group IV materials, e.g. B-doped Si or undoped Ge - H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN} - H10D 84/01: Manufacture or treatment - H10D 84/144: {in antiparallel diode configurations} - H10D 84/403: {Combinations of FETs or IGBTs with BJTs and with one or more of diodes, resistors or capacitors} - H10D 84/811: {Combinations of field-effect devices and one or more diodes, capacitors or resistors} - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) - H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P) - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract A hybrid switch apparatus includes a gate drive circuit producing a gate drive signal, a GaN high electron mobility transistor (HEMT) having a first gate, a first drain, and a first source. A silicon (Si) MOSFET has a second gate, a second drain, and a second source. The GaN HEMT and the Si MOSFET are connected in a parallel arrangement so that (i) the first drain and the second drain are electrically connected and (ii) the first source and the second source are electrically connected. The second gate is connected to the gate drive circuit output to receive the gate drive signal. A delay block has an input connected to the gate drive circuit output and an delay block output is configured to produce a delayed gate drive signal for driving the GaN HEMT. ## Claims ### Claim at position 1 -12. (canceled) ### Claim 13 An apparatus comprising: means for producing (i) a gate drive signal on a gate drive output and (ii) a delayed gate drive signal that is delayed relative to said gate drive signal, wherein said gate drive signal comprises an ON state and an OFF state; a first type of electrical switching device having a first gate, a first drain, and a first source; a second type of switching device different from said first type of switching device wherein said second type of switching device includes a second gate, a second drain, and a second source, said first type of switching device and said second type of switching device being electrically connected in a parallel arrangement wherein (i) said first drain and said second drain are electrically connected and (ii) said first source and said second source are electrically connected; wherein said first gate of said first type of switching device is electrically connected to said producing means to receive said delayed gate drive signal and said second gate of said second type of switching device is electrically connected to said producing means to receive said gate drive signal; wherein in said paralleled arrangement said second type of switching device has a source-drain reverse conduction voltage drop that is less than that of said first type of switching device such that when said gate drive signal and said delayed gate drive signal are in said OFF state, a reverse conduction current flow through said first type of switching device is inhibited relative to said second type of switching device. ### Claim 14 (depends on 13) The apparatus of claim 13 wherein said second type of switching device comprises a body diode between said second source and said second drain wherein said source-drain reverse conduction voltage drop is defined by said body diode when said gate drive signal and said delayed gate drive signal are in said OFF state. ### Claim 15 (depends on 14) The apparatus of claim 14 wherein said second type of switching device comprises a silicon (Si) MOSFET device. ### Claim 16 (depends on 14) The apparatus of claim 14 wherein said first type of switching device comprises a wide-bandgap (WBG) device. ### Claim 17 (depends on 15) The apparatus of claim 15 wherein said WBG device comprises one of a Silicon Carbide (SiC) device and a Gallium Nitride (GaN) HEMT. ### Claim 18 (depends on 13) The apparatus of claim 13 wherein said producing means comprises a gate drive circuit having at least one gate drive output configured to produce said gate drive signal on said gate drive output and a delay block having an output configured to produce said delayed gate drive signal. ### Claim 19 (depends on 18) The apparatus of claim 18 wherein said delay block comprises an resistor-capacitor (RC) circuit. ### Claim 20 (depends on 13) The apparatus of claim 13 wherein when said gate drive signal transitions from said ON state to said OFF state, said producing means delays a transition of said delayed gate drive signal from said ON state to said OFF state such that said second type of switching device is turned off while said first type of switching device remains on. ### Claim 21 (depends on 20) The apparatus of claim 20 wherein after said producing means delays a transition of said delayed gate drive signal from said ON state to said OFF state, said delayed gate drive signal in said OFF state turns off said first type of switching device wherein a switching-off loss of said apparatus is substantially undertaken by said first type of switching device. ### Claim 22 (depends on 13) The apparatus of claim 13 further comprising an electronic control unit configured to control said gate drive circuit in accordance with a zero voltage switching (ZVS) strategy, wherein said electronic control unit is configured to control said producing means to output said gate drive signal in said ON and OFF state, and wherein said electronic control unit is further configured to control said producing means in accordance with said ZVS strategy so as to transition said gate drive signal from said OFF state to said ON state. ### Claim 23 (depends on 13) The apparatus of claim 13 wherein said first type of switching device and said second type of switching device form a first hybrid switch arrangement, said apparatus further comprising a second hybrid switch arrangement replicating said first hybrid switch arrangement, and wherein said first and second sources of said first hybrid switch arrangement are connected to said first and second drains of said second hybrid switch arrangement at a common node. ### Claim 24 (depends on 22) The apparatus of claim 22 wherein said first and second hybrid switch arrangements are used in a bridge circuit. ### Claim 25 An apparatus comprising: means for producing (i) a gate drive signal on a gate drive output and (ii) a delayed gate drive signal that is delayed relative to said gate drive signal, wherein said gate drive signal comprises an ON state and an OFF state; a first type of electrical switching device comprising a wide-bandgap (WBG) device having a first gate, a first drain, and a first source; a second type of switching device different from said first type of switching device wherein said second type of switching device includes a second gate, a second drain, and a second source, said first type of switching device and said second type of switching device being electrically connected in a parallel arrangement wherein (i) said first drain and said second drain are electrically connected and (ii) said first source and said second source are electrically connected; wherein said first gate of said first type of switching device is electrically connected to said producing means to receive said delayed gate drive signal and said second gate of said second type of switching device is electrically connected to said producing means to receive said gate drive signal; wherein in said paralleled arrangement said second type of switching device has a body diode between said second source and said second drain such that when said gate drive signal and said delayed gate drive signal are in said OFF state, a reverse conduction current flow through said second type of switching device is promoted and is inhibited in said first type of switching device; and wherein when said gate drive signal transitions from said ON state to said OFF state, said producing means delays a transition of said delayed gate drive signal from said ON state to said OFF state such that said second type of switching device is turned off while said first type of switching device remains on. ### Claim 26 (depends on 25) The apparatus of claim 25 wherein said second type of switching device comprises a silicon (Si) MOSFET device. ### Claim 27 (depends on 25) The apparatus of claim 25 wherein said WBG device comprises one of a Silicon Carbide (SiC) device and a Gallium Nitride (GaN) HEMT. ### Claim 28 (depends on 25) The apparatus of claim 25 wherein said producing means comprises a gate drive circuit having at least one gate drive output configured to produce said gate drive signal on said gate drive output and a delay block having an output configured to produce said delayed gate drive signal. ### Claim 29 (depends on 25) The apparatus of claim 25 wherein after said producing means delays a transition of said delayed gate drive signal from said ON state to said OFF state, said delayed gate drive signal in said OFF state turns off said first type of switching device wherein a switching-off loss of said apparatus is substantially undertaken by said first type of switching device. ### Claim 30 (depends on 25) The apparatus of claim 25 further comprising an electronic control unit configured to control said gate drive circuit in accordance with a zero voltage switching (ZVS) strategy, wherein said electronic control unit is configured to control said producing means to output said gate drive signal in said ON and OFF state, and wherein said electronic control unit is further configured to control said producing means in accordance with said ZVS strategy so as to transition said gate drive signal from said OFF state to said ON state. ### Claim 31 (depends on 25) The apparatus of claim 25 wherein said first type of switching device and said second type of switching device form a first hybrid switch arrangement, said apparatus further comprising a second hybrid switch arrangement replicating said first hybrid switch arrangement, and wherein said first and second sources of said first hybrid switch arrangement are connected to said first and second drains of said second hybrid switch arrangement at a common node. ### Claim 32 (depends on 31) The apparatus of claim 31 wherein said first and second hybrid switch arrangements are used in a bridge circuit.