# US 2018/0026077 A1 · Memory device

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- Number: US 2018/0026077 A1
- Document ID: US20180026077A1
- Status: Published application
- Kind: A1
- Application number: 15/421,498
- Filed: 2017-02-01
- Published: 2018-01-25
- Earliest claimed: 2016-07-22
- Assignees: Samsung Electronics Co., Ltd.
- Applicants: Samsung Electronics Co., Ltd.
- Inventors: Zhe Wu; Dong-ho Ahn; Hideki Horii; Soon-oh Park; Jeong-hee Park; Jin-woo Lee; Dong-jun Seong; Seol Choi
- Web page: https://patentgrep.com/patent/US20180026077A1

## CPC

- H10B 63/84: {arranged in a direction perpendicular to the substrate, e.g. 3D cell arrays}
- H10N 70/063: {by etching of pre-deposited switching material layers, e.g. lithography}
- H10N 70/231: {based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect}
- H10N 70/826: {adapted for essentially vertical current flow, e.g. sandwich or pillar type devices}
- H10N 70/8413: {adapted for resistive heating}
- H10N 70/8825: {Selenides, e.g. GeSe}
- H10N 70/8828: {Tellurides, e.g. GeSbTe}
- H10B: ELECTRONIC MEMORY DEVICES
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR

## Abstract

A memory device includes a variable resistance layer and a selection device layer electrically connected to the variable resistance layer. The memory device further included a chalcogenide switching material that reduces leakage current and has, for example, a composition according to chemical formula 1 below, [GeXSiY(AsaTe1-a)Z](1-U)[N]U (1) (where 0.05≦X≦0.1, 0.15≦Y≦0.25, 0.7≦Z≦0.8, X+Y+Z=1, 0.45≦a≦0.6, and 0.08≦U≦0.2).

## Claims

### Claim 1

A memory device comprising:
a variable resistance layer; and
a selection device layer electrically connected to the variable resistance layer and comprising a chalcogenide switching material having a composition according to chemical formula 1 below,
[GeXSiY(AsaTe1-a)Z](1-U)[N]U (1)
(where 0.05≦X≦0.1, 0.15≦Y≦0.25, 0.7≦Z≦0.8, X+Y+Z=1, 0.45≦a≦0.6, and 0.08≦U≦0.2).

### Claim 2 (depends on 1)

The memory device of claim 1, wherein in the chemical formula 1, X ranges from about 0.06 to about 0.08 and Y ranges from about 0.17 to about 0.22.

### Claim 3 (depends on 1)

The memory device of claim 1, wherein in the chemical formula 1, Z ranges from about 0.5 to about 0.6.

### Claim 4 (depends on 1)

The memory device of claim 1, wherein in the chemical formula 1, U ranges from about 0.15 to about 0.2.

### Claim 5 (depends on 1)

The memory device of claim 1, wherein the chalcogenide switching material has a composition according to chemical formula 2 below, in which carbon (C) is further added to the chemical formula 1,
[GeXSiY(AsaTe1-a)Z](1-U-V)[N]U[C]V (2)
(where 0.05≦X≦0.1, 0.15≦Y≦0.25, 0.7≦Z≦0.8, X+Y+Z=1, 0.45≦a≦0.6, 0.08≦U≦0.2, and 0.01≦V≦0.15).

### Claim 6 (depends on 5)

The memory device of claim 5, wherein in the chemical formula 2, U ranges from about 0.1 to about 0.15 and V ranges from about 0.04 to about 0.1.

### Claim 7 (depends on 1)

The memory device of claim 1, wherein the chalcogenide switching material is configured to have ovonic threshold switching characteristics.

### Claim 8 (depends on 1)

The memory device of claim 1, wherein the variable resistance layer comprises a chalcogenide material having a different composition from that of the chalcogenide switching material.

### Claim 9 (depends on 1)

The memory device of claim 1, wherein the variable resistance layer comprises a super lattice structure including at least one of GeSbTe, InSbTe, and BiSbTe, or including GeTe and SbTe that are repeatedly stacked.

### Claim 10

A memory device comprising:
a variable resistance layer; and
a selection device layer electrically connected to the variable resistance layer and comprising a chalcogenide switching material having a composition according to chemical formula 3 below,
GeXSiYAsZ(TebSe1-b)W (3)
(where 0.05≦X≦0.1, 0.15≦Y≦0.25, 0.35≦Z≦0.45, 0.7≦b≦1.0, 0.3≦W≦0.4, and X+Y+Z+W=1).

### Claim 11 (depends on 10)

The memory device of claim 10, wherein the chalcogenide switching material comprises selenium (Se) in an amount of about 3.5% to about 8% and tellurium (Te) in an amount of about 24% to about 28%.

### Claim 12 (depends on 10)

The memory device of claim 10, wherein the chalcogenide switching material comprises germanium (Ge) in an amount of about 6% to about 8% and silicon (Si) in an amount of about 17% to about 22%.

### Claim 13 (depends on 10)

The memory device of claim 10, wherein the chalcogenide switching material has a composition according to chemical formula 4 below, which further contains nitrogen (N) in addition to the chemical formula 3,
[GeXSiYAsZ(TebSe1-b)W](1-U)[N]U (4)
(where 0.05≦X≦0.1, 0.15≦Y≦0.25, 0.35≦Z≦0.45, 0.7≦b≦1.0, 0.3≦W≦0.4, X+Y+Z+W=1, and 0.08≦U≦0.2).

### Claim 14 (depends on 13)

The memory device of claim 13, wherein the chalcogenide switching material comprises nitrogen (N) in an amount of about 15% to about 20%.

### Claim 15 (depends on 10)

The memory device of claim 10, wherein the chalcogenide switching material has a composition according to chemical formula 5 below, which further contains nitrogen (N) and carbon (C) in addition to the chemical formula 3,
[GeXSiYAsZ(TebSe1-b)W](1-U-V)[N]U[C]V (5)
(where 0.05≦X≦0.1, 0.15≦Y≦0.25, 0.35≦Z≦0.45, 0.7≦b≦1.0, 0.3≦W≦0.4, X+Y+Z+W=1, 0.08≦U≦0.2, and 0.01≦V≦0.15).

### Claim 16 (depends on 15)

The memory device of claim 15, wherein the chalcogenide switching material comprises nitrogen (N) in an amount of about 10% to about 15% and carbon (C) in an amount of about 4% to about 10%.

### Claim at position 17

17-22. (canceled)

### Claim 23

A memory device comprising:
a plurality of word lines extending along a first direction and spaced apart from each other along a second direction that is perpendicular to the first direction;
a plurality of bit lines extending along the second direction and spaced apart from each other in the first direction, the plurality of bit lines being spaced apart from the plurality of word lines in a third direction that is perpendicular to both the first and second directions;
a plurality of memory cells each one of which being arranged between corresponding cross points of the word and bit lines, each of said memory cells comprising;
a lower electrode layer;
a selection device layer;
an intermediate electrode layer;
a variable resistance layer; and
an upper electrode,
wherein the variable resistance layer includes a chalcogenide switching material having a composition that reduces leakage current.

### Claim 24 (depends on 23)

The memory device of claim 23, wherein the chalcogenide switching material includes Ge, Si, As, Te and N.

### Claim 25 (depends on 24)

The memory device of claim 24, wherein Ge comprises 5 to 10% of the chalcogenide switching material having a formula of [GeX SiY (Asa Te1-a)Z](1-U) [N]U, where 0.05≦X≦0.1, 0.15≦Y≦0.25, 0.7≦Z≦0.8, X+Y+Z=1, 0.45≦a≦0.6, and 0.08≦U≦0.2.

### Claim 26

(canceled)

### Claim 27 (depends on 24)

The memory device of claim 24, wherein As and Te comprises the chalcogenide switching material having a formula of [GeX SiY (Asa Te1-a)Z](1-U) [N]U, where 0.05≦X≦0.1, 0.15≦Y≦0.25, 0.7≦Z≦0.8, X+Y+Z=1, 0.45≦a≦0.6, and 0.08≦U≦0.2 so that the ratio of As with respect to the entire amount of As and Te is about 0.45 to 0.6.

### Claim at position 23

28-33. (canceled)