# US 2018/0026073 A1 · Solid-state imaging device, manufacturing method of solid-state imaging device, and imaging system > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2018/0026073 A1 - Document ID: US20180026073A1 - Status: Published application - Kind: A1 - Application number: 15/631,391 - Filed: 2017-06-23 - Published: 2018-01-25 - Earliest claimed: 2016-07-21 - Assignees: Canon Kabushiki Kaisha - Applicants: Canon Kabushiki Kaisha - Inventors: Hiromasa Tsuboi; Fumihiro Inui; Masahiro Kobayashi - Web page: https://patentgrep.com/patent/US20180026073A1 ## CPC - H10F 39/80: {Constructional details of image sensors} - H10F 39/80377: {characterised by the channel of the transistor, e.g. channel having a doping gradient} - H10F 39/011: {Manufacture or treatment of image sensors covered by group H10F39/12} - H10F 39/8023: {Disposition of the elements in pixels, e.g. smaller elements in the centre of the imager compared to larger elements at the periphery} - H10F 39/807: {Pixel isolation structures} - H10F 39/803: {Pixels having integrated switching, control, storage or amplification elements} - H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION ## Abstract A solid-state imaging device has: a counter dope region of a first conductivity type which is formed so as to surround a drain region of a transfer transistor of the solid-state imaging device and in which impurity concentration of the first conductivity type is lower than that of the drain region; and an isolating region of a second conductivity type which is formed in a deep region below channel regions of a plurality of transistors and in which impurity concentration of the second conductivity type is higher than that of a well region, wherein a depth position of a lower surface of the counter dope region is deeper than a depth position of a lower surface of a buried channel region. ## Claims ### Claim 1 A solid-state imaging device having a pixel in which a photoelectric conversion unit configured to accumulate electric charges generated by photoelectrically converting incident light, a transfer transistor of an MOS type configured to transfer the electric charges from the photoelectric conversion unit to a floating diffusion unit, and an outputting unit configured to output a signal corresponding to an amount of electric charges transferred to the floating diffusion unit are arranged in a well region of a second conductivity type, wherein a first semiconductor region of the well region includes a first isolating region of the second conductivity type which is formed in a deep region below a drain region of a first conductivity type of the transfer transistor and in which impurity concentration of the second conductivity type is higher than that of the well region and a counter dope region of the first conductivity type which is formed in a region from an upper surface of the first semiconductor region to a depth position where impurity concentration of the first conductivity type of the photoelectric conversion unit becomes a peak so as to surround the drain region and in which the impurity concentration of the first conductivity type is lower than that of the drain region; a second semiconductor region extending in a direction which perpendicularly crosses the first semiconductor region when seen as a plan view includes a buried channel region of the first conductivity type formed in channel regions of a plurality of transistors which the outputting unit has and a second isolating region of the second conductivity type which is formed in a deep region below the buried channel region and in which impurity concentration of the second conductivity type is higher than that of the well region; and a depth position of a lower surface of the counter dope region is deeper than a depth position of a lower surface of the buried channel region. ### Claim 2 (depends on 1) A device according to claim 1, wherein: the transfer transistor further has a gate electrode formed over a channel region between the photoelectric conversion unit and the drain region through an insulating film; and the counter dope region overlaps partially with the gate electrode when seen as a plan view. ### Claim 3 (depends on 1) A device according to claim 1, wherein: a third isolating region in which impurity concentration of the second conductivity type is higher as a depth become shallower is further formed over the first isolating region of the first semiconductor region; and a fourth isolating region in which impurity concentration of the second conductivity type is higher as a depth become shallower is further formed over the second isolating region of the second semiconductor region. ### Claim 4 (depends on 1) A device according to claim 1, wherein the plurality of transistors include: an amplifier transistor configured to output a signal corresponding to the amount of electric charges transferred to the floating diffusion unit; a reset transistor configured to reset the electric charges transferred to the floating diffusion unit; and a select transistor configured to output the signal output from the amplifier transistor to a column signal line. ### Claim 5 (depends on 1) A device according to claim 1, wherein: the photoelectric conversion unit includes a first photoelectric conversion unit and a second photoelectric conversion unit; the transfer transistor includes a first transfer transistor and a second transfer transistor which share the drain region, the first transfer transistor transfers the electric charges from the first photoelectric conversion unit to the floating diffusion unit, and the second transfer transistor transfers the electric charges from the second photoelectric conversion unit to the floating diffusion unit; the first transfer transistor and the second transfer transistor have a first gate electrode and a second gate electrode, formed through an insulating film, over channel regions between the photoelectric conversion unit and the drain region, respectively; and the drain region has an extending portion between the first gate electrode and the second gate electrode when seen as a plan view. ### Claim 6 (depends on 5) A device according to claim 5, wherein a depth position of a lower surface of the extending portion is shallower than a depth position of a lower surface of the drain region. ### Claim 7 (depends on 1) A device according to claim 1, wherein: the photoelectric conversion unit includes a first photoelectric conversion unit and a third photoelectric conversion unit; the transfer transistor includes a first transfer transistor and a third transfer transistor which share the drain region, the first transfer transistor transfers the electric charges from the first photoelectric conversion unit to the floating diffusion unit, and the third transfer transistor transfers the electric charges from the third photoelectric conversion unit to the floating diffusion unit; and the first photoelectric conversion unit and the third photoelectric conversion unit are line-symmetrically arranged while setting a line passing through the drain region to an axis of symmetry when seen as a plan view. ### Claim 8 (depends on 7) A device according to claim 7, further comprising a pixel isolating portion formed in a boundary portion between the adjacent pixels, and wherein the pixel isolating portion is not come into contact with the drain region and the counter dope region. ### Claim 9 A manufacturing method of a solid-state imaging device having a pixel in which a photoelectric conversion unit configured to accumulate electric charges generated by photoelectrically converting incident light, a transfer transistor of an MOS type configured to transfer the electric charges from the photoelectric conversion unit to a floating diffusion unit, and an outputting unit configured to output a signal corresponding to an amount of electric charges transferred to the floating diffusion unit are arranged in a well region of a second conductivity type, comprising the steps of: forming a first isolating region of the second conductivity type in which impurity concentration of the second conductivity type is higher than that of the well region into a deep region of a first semiconductor region of the well region; injecting impurities of a first conductivity type into the first semiconductor region from an upper surface of the first semiconductor region to a depth position where impurity concentration of the first conductivity type of the photoelectric conversion unit becomes a peak, thereby forming a counter dope region of the first conductivity type; forming a drain region of the first conductivity type in which impurity concentration of the first conductivity type is higher than that of the counter dope region into the counter dope region; forming a second isolating region of the second conductivity type in which impurity concentration of the second conductivity type is higher than that of the well region into a deep region of a second semiconductor region extending in a direction which perpendicularly crosses the first semiconductor region when seen as a plan view; and forming a plurality of transistors over the second isolating region and forming a buried channel region of the first conductivity type into channel regions of the plurality of transistors, wherein the step of forming the counter dope region and the step of forming the buried channel region are executed by using different photomasks. ### Claim 10 (depends on 9) A method according to claim 9, wherein the step of forming the first isolating region and the step of forming the second isolating region are executed by using different photomasks. ### Claim 11 (depends on 10) A method according to claim 10, wherein: the step of forming the first isolating region and the step of forming the counter dope region are executed by using a same photomask; and the step of forming the second isolating region and the step of forming the buried channel region are executed by using a same photomask. ### Claim 12 An imaging system having a solid-state imaging device and a signal processing unit configured to process a signal which is output from the solid-state imaging device, wherein: the solid-state imaging device has a pixel in which a photoelectric conversion unit configured to accumulate electric charges generated by photoelectrically converting incident light, a transfer transistor of an MOS type configured to transfer the electric charges from the photoelectric conversion unit to a floating diffusion unit, and an outputting unit configured to output a signal corresponding to an amount of electric charges transferred to the floating diffusion unit are arranged in a well region of a second conductivity type; a first semiconductor region of the well region includes a first isolating region of the second conductivity type which is formed in a deep region below a drain region of a first conductivity type of the transfer transistor and in which impurity concentration of the second conductivity type is higher than that of the well region and a counter dope region of the first conductivity type which is formed in a region from an upper surface of the first semiconductor region to a depth position where impurity concentration of the first conductivity type of the photoelectric conversion unit becomes a peak so as to surround the drain region and in which the impurity concentration of the first conductivity type is lower than that of the drain region; a second semiconductor region extending in a direction which perpendicularly crosses the first semiconductor region when seen as a plan view includes a buried channel region of the first conductivity type formed in channel regions of a plurality of transistors which the outputting unit has and a second isolating region of the second conductivity type which is formed in a deep region below the buried channel region and in which impurity concentration of the second conductivity type is higher than that of the well region; and a depth position of a lower surface of the counter dope region is higher than a depth position of a lower surface of the buried channel region.