# US 2018/0026046 A1 · Memory device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2018/0026046 A1 - Document ID: US20180026046A1 - Status: Published application - Kind: A1 - Application number: 15/375,944 - Filed: 2016-12-12 - Published: 2018-01-25 - Earliest claimed: 2016-07-19 - Assignees: Samsung Electronics Co., Ltd. - Inventors: Phil Ouk NAM; Sung Gil KIM; Seulye KIM; Hong Suk KIM; Jae Young AHN; Ji Hoon CHOI - Web page: https://patentgrep.com/patent/US20180026046A1 ## CPC - H10B 43/27: the channels comprising vertical portions, e.g. U-shaped channels - H10B 41/10: characterised by the top-view layout - H10B 41/27: the channels comprising vertical portions, e.g. U-shaped channels - H10B 43/10: characterised by the top-view layout - H10B 43/35: with cell select transistors, e.g. NAND - H10B 43/50: characterised by the boundary region between the core and peripheral circuit regions - H10D 30/6891: {characterised by the shapes, relative sizes or dispositions of the floating gate electrode} - H10D 30/694: {characterised by the shapes, relative sizes or dispositions of the gate electrodes} - H10B: ELECTRONIC MEMORY DEVICES - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract In one embodiment, the semiconductor device includes a stack of alternating first interlayer insulating layers and gate electrode layers on a substrate. At least one of the gate electrode layers has a first portion and a second portion. The second portion forms an end portion of the at least one gate electrode layer, and a bottom surface of the second portion is at a lower level than a bottom surface of the first portion. A contact plug extends from the second portion. ## Claims ### Claim 1 A semiconductor device, comprising: a stack of alternating first interlayer insulating layers and gate electrode layers on a substrate, at least one of the gate electrode layers having a first portion and a second portion, the second portion forming an end portion of the at least one gate electrode layer, and a bottom surface of the second portion being at a lower level than a bottom surface of the first portion; and a contact plug extending from the second portion. ### Claim 2 (depends on 1) The semiconductor device of claim 1, wherein the at least one gate electrode layer curves convexly from the bottom surface of the first portion to the bottom surface of the second portion. ### Claim 3 (depends on 2) The semiconductor device of claim 2, wherein the second portion curves convexly from a bottom surface to an end of the second portion. ### Claim 4 (depends on 1) The semiconductor device of claim 1, wherein the second portion curves convexly from a bottom surface to an end of the second portion. ### Claim 5 (depends on 1) The semiconductor device of claim 1, wherein an end of the second portion has a half bullnose shape. ### Claim 6 (depends on 1) The semiconductor device of claim 1, wherein an end of the second portion has a concave profile. ### Claim 7 (depends on 1) The semiconductor device of claim 1, wherein a top surface of the second portion is at a higher level than a top surface of the first portion. ### Claim 8 (depends on 7) The semiconductor device of claim 7, wherein a first difference between a level of the bottom surface of the second portion and a level of the bottom surface of the first portion is greater than a second difference between a level of the top surface of the second portion and a level of the top surface of the first portion. ### Claim 9 (depends on 7) The semiconductor device of claim 7, wherein an end of the second portion has a full bullnose shape. ### Claim 10 (depends on 7) The semiconductor device of claim 7, wherein an end of the second portion has a concave profile. ### Claim 11 (depends on 7) The semiconductor device of claim 7, wherein the at least one gate electrode layer curves convexly from the bottom surface of the first portion to the bottom surface of the second portion, and the at least one gate electrode layer curves convexly from the top surface of the first portion to the top surface of the second portion. ### Claim 12 (depends on 7) The semiconductor device of claim 7, further comprising: a second interlayer insulating layer over the stack; and wherein the contact plug extends through the second interlayer insulating layer. ### Claim 13 (depends on 12) The semiconductor device of claim 12, wherein a portion of the second interlayer insulating layer at the second portion include impurities, and a portion of the first interlayer insulating layers directly above and directly below the second portion include the impurities. ### Claim 14 (depends on 1) The semiconductor device of claim 1, further comprising: a second interlayer insulating layer over the stack; and wherein the contact plug extends through the second interlayer insulating layer. ### Claim 15 (depends on 14) The semiconductor device of claim 14, wherein a portion of the second interlayer insulating layer at the second portion include impurities, and a portion of the first interlayer insulating layer directly below the second portion includes the impurities. ### Claim 16 A semiconductor device, comprising: a stack of alternating interlayer insulating layers and gate electrode layers on a substrate, at least one of the gate electrode layers having a first portion and second portion, the second portion forming an end portion of the at least one gate electrode layer, and a bottom surface of the second portion being closer to the substrate than a bottom surface of the first portion; and a contact plug extending from the second portion. ### Claim 17 A semiconductor device, comprising: a stack of alternating interlayer insulating layers and gate electrode layers on a substrate, at least one of the gate electrode layers having a first portion and second portion, the second portion forming an end of the at least one gate electrode layer, and as the at least one gate electrode layer transitions from the first portion to the second portion, the at least one gate electrode layer projects towards the substrate; and a contact plug extending from the second portion. ### Claim at position 18 18-32. (canceled) ### Claim 33 (depends on 17) The semiconductor device of claim 17, wherein a thickness of the second portion is greater than a thickness of the first portion. ### Claim 34 (depends on 17) The semiconductor device of claim 17, wherein a bottom surface of the second portion is closer to the substrate than a bottom surface of the first portion. ### Claim 35 (depends on 17) The semiconductor device of claim 17, wherein an upper surface of the second portion is farther from the substrate than an upper surface of the first portion.