# US 2018/0026040 A1 · Method of manufacturing semiconductor device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2018/0026040 A1 - Document ID: US20180026040A1 - Status: Published application - Kind: A1 - Application number: 15/616,471 - Filed: 2017-06-07 - Published: 2018-01-25 - Earliest claimed: 2016-07-25 - Assignees: Samsung Electronics Co., Ltd. - Applicants: Samsung Electronics Co., Ltd. - Inventors: Hyun Sil HONG; Seong Mo KOO - Web page: https://patentgrep.com/patent/US20180026040A1 ## CPC - H10B 12/01: {Manufacture or treatment} - H10B 12/0335: {Making a connection between the transistor and the capacitor, e.g. plug} - H10B 12/053: {the transistor being at least partially in a trench in the substrate (vertical transistor in combination with a capacitor formed in a substrate trench H10B12/0383)} - H10B 12/315: {with the capacitor higher than a bit line} - H10B 12/34: {the transistor being at least partially in a trench in the substrate} - H10P 14/40: of conductive or resistive materials - H10P 50/283: {by chemical means} - H10P 50/73: {using masks for insulating materials} - H10B: ELECTRONIC MEMORY DEVICES - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 ## Abstract A method of manufacturing a semiconductor device includes stacking a molding layer and a preliminary support layer on a substrate, forming a support layer having a plurality of openings by removing at least a portion of the preliminary support layer, forming a sacrificial layer by filling the plurality of openings with a different material from a material of the molding layer and from a material of the preliminary support layer, forming a plurality of vertical holes through the support layer and through the molding layer, forming a lower electrode within the plurality of vertical holes, and removing the sacrificial layer and the molding layer. ## Claims ### Claim 1 A method of manufacturing a semiconductor device, the method comprising: stacking a molding layer and a preliminary support layer on a substrate; forming a support layer having a plurality of openings by removing at least a portion of the preliminary support layer; forming a sacrificial layer by filling the plurality of openings with a different material from a material of the molding layer and from a material of the preliminary support layer; forming a plurality of vertical holes through the support layer and through the molding layer; forming a lower electrode within the plurality of vertical holes; and removing the sacrificial layer and the molding layer. ### Claim 2 (depends on 1) The method of manufacturing a semiconductor device as claimed in claim 1, wherein forming the plurality of vertical holes includes forming at least a portion of the plurality of vertical holes at a boundary between the sacrificial layer and the support layer. ### Claim 3 (depends on 1) The method of manufacturing a semiconductor device as claimed in claim 1, wherein the molding layer is formed of a material having a predetermined etch selectivity with respect to the material of the support layer. ### Claim 4 (depends on 1) The method of manufacturing a semiconductor device as claimed in claim 1, wherein the sacrificial layer is formed of a material having a predetermined etch selectivity with respect to the material of the support layer. ### Claim 5 (depends on 1) The method of manufacturing a semiconductor device as claimed in claim 1, wherein the support layer is formed of at least one of a silicon nitride and a silicon carbon nitride, the sacrificial layer is formed of a silicon oxynitride, and the molding layer is formed of a silicon oxide. ### Claim 6 (depends on 1) The method of manufacturing a semiconductor device as claimed in claim 1, wherein the plurality of vertical holes are formed using a dry etching process. ### Claim 7 (depends on 1) The method of manufacturing a semiconductor device as claimed in claim 1, wherein the sacrificial layer and the molding layer are removed using a strip process. ### Claim 8 (depends on 7) The method of manufacturing a semiconductor device as claimed in claim 7, wherein the molding layer is removed by performing the strip process through a region from which the sacrificial layer is removed. ### Claim 9 (depends on 1) The method of manufacturing a semiconductor device as claimed in claim 1, wherein the lower electrode is formed to have a cylindrical shape. ### Claim 10 (depends on 1) The method of manufacturing a semiconductor device as claimed in claim 1, wherein the sacrificial layer is formed to have a plurality of regularly disposed regions. ### Claim 11 (depends on 1) The method of manufacturing a semiconductor device as claimed in claim 1, wherein an area of the sacrificial layer is smaller than an area of the support layer. ### Claim 12 (depends on 1) The method of manufacturing a semiconductor device as claimed in claim 1, wherein a thickness of the sacrificial layer is a same as a thickness of the support layer. ### Claim 13 (depends on 1) The method of manufacturing a semiconductor device as claimed in claim 1, wherein the molding layer is formed to be thicker than the support layer. ### Claim 14 A method of manufacturing a semiconductor device, the method comprising: alternately stacking a plurality of support layers and a plurality of molding layers on a substrate, each of the support layers including a plurality of openings and a plurality of sacrificial layers within the plurality of openings; forming a plurality of vertical holes through the plurality of support layers and through the plurality of molding layers; forming a lower electrode within the plurality of vertical holes; removing the plurality of sacrificial layers included in the plurality of support layers and the plurality of molding layers; and sequentially forming a dielectric layer and an upper electrode on the lower electrode layer. ### Claim 15 (depends on 14) The method of manufacturing a semiconductor device as claimed in claim 14, wherein the plurality of sacrificial layers included in different support layers of the plurality of support layers are formed to overlap each other. ### Claim 16 A method of manufacturing a semiconductor device, the method comprising: stacking a molding layer and a preliminary support layer on a substrate; forming a support layer having a plurality of openings by removing at least a portion of the preliminary support layer; forming a sacrificial layer by filling the plurality of openings in the support layer with a different material from a material of the molding layer and from a material of the preliminary support layer, dry etching rate of the materials of the sacrificial layer and of the support layer being similar; forming a plurality of vertical holes through the support layer and through the molding layer by dry etching the support layer and the molding layer; forming a lower electrode within the plurality of vertical holes; and removing the sacrificial layer and the molding layer. ### Claim 17 (depends on 16) The method of manufacturing a semiconductor device as claimed in claim 16, wherein forming the sacrificial layer in the support layer includes forming the sacrificial layer to completely fill the plurality of openings in the support layer, such that top surfaces of the sacrificial and support layers face a same direction and are level with each other, and bottom surfaces of the sacrificial and support layers face a same direction and are level with each other. ### Claim 18 (depends on 17) The method of manufacturing a semiconductor device as claimed in claim 17, wherein forming the plurality of vertical holes includes forming at least a portion of the plurality of vertical holes at a boundary between the sacrificial layer and the support layer, such that each vertical hole at the boundary between the sacrificial layer and the support layer penetrates both the sacrificial layer and the support layer. ### Claim 19 (depends on 16) The method of manufacturing a semiconductor device as claimed in claim 16, wherein forming the sacrificial layer includes using a material that has a same wet etching rate as that of the material of the molding layer. ### Claim 20 (depends on 19) The method of manufacturing a semiconductor device as claimed in claim 19, wherein dry etching the support layer and the molding layer to form the plurality of vertical holes is simultaneous, and a subsequent removal of the sacrificial layer and the molding layer via wet etching is simultaneous.