# US 2018/0026012 A1 · Multilayer substrate

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 2018/0026012 A1
- Document ID: US20180026012A1
- Status: Published application
- Kind: A1
- Application number: 15/543,397
- Filed: 2016-01-13
- Published: 2018-01-25
- Earliest claimed: 2015-01-13
- Assignees: Dexerials Corporation
- Applicants: Dexerials Corporation
- Inventors: Yasushi AKUTSU; Tomoyuki ISHIMATSU
- Web page: https://patentgrep.com/patent/US20180026012A1

## CPC

- H10W 90/00: Package configurations
- H10W 46/00: Marks applied to devices, e.g. for alignment or identification
- H10W 46/301: {for alignment}
- H10W 72/01204: {using temporary auxiliary members, e.g. using sacrificial coatings or handle substrates}
- H10W 72/01212: {at a different location than on the final device, e.g. forming solder preforms}
- H10W 72/013: {of die-attach connectors}
- H10W 72/01304: {using temporary auxiliary members, e.g. using sacrificial coatings or handle substrates}
- H10W 72/01361: {Chemical or physical modification, e.g. by sintering or anodisation (patterning H10W72/01351)}
- H10W 72/072: {of bump connectors}
- H10W 72/07223: {Active alignment, e.g. using optical alignment using marks or sensors}
- H10W 72/07232: {Compression bonding, e.g. thermocompression bonding}
- H10W 72/07253: {changes in shapes}
- H10W 72/07254: {changes in dispositions}
- H10W 72/073: {of die-attach connectors}
- H10W 72/07323: {Active alignment, e.g. using optical alignment using marks or sensors}
- H10W 72/07332: {Compression bonding, e.g. thermocompression bonding}
- H10W 72/07338: {hardening the adhesive by curing, e.g. thermosetting}
- H10W 72/07354: {changes in dispositions}
- H10W 72/223: {characterised by the structure of the outermost layers, e.g. multilayered coatings}
- H10W 72/224: {Bumps having multiple side-by-side cores}
- H10W 72/225: {Bumps having a filler embedded in a matrix}
- H10W 72/234: {Cross-sectional shape, i.e. in side view}
- H10W 72/244: {relative to underlying supporting features, e.g. bond pads, RDLs or vias}
- H10W 72/247: {Dispositions of multiple bumps}
- H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu}
- H10W 72/253: {not comprising solid metals or solid metalloids, e.g. polymers or ceramics}
- H10W 72/255: {of outermost layers of multilayered bumps, e.g. material of a coating}
- H10W 72/261: {Functions other than electrical connecting}
- H10W 72/325: {Die-attach connectors having a filler embedded in a matrix}
- H10W 72/347: {Dispositions of multiple die-attach connectors}
- H10W 72/353: {not comprising solid metals or solid metalloids, e.g. ceramics}
- H10W 72/354: {comprising polymers}
- H10W 72/823: {Interconnections through encapsulations, e.g. pillars through molded resin on a lateral side a chip}
- H10W 74/15: on active surfaces of flip-chip devices, e.g. underfills
- H10W 90/26: the stacked chips being of the same size without any chips being laterally offset, e.g. chip stacks having a rectangular shape
- H10W 90/288: {characterised by arrangements for thermal management of the stacked chips}
- H10W 90/291: {characterised by containers, encapsulations, or other housings for the stacked chips}
- H10W 90/297: {characterised by the through-semiconductor vias [TSVs] in the stacked chips}
- H10W 90/722: {between stacked chips}
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/732: {between stacked chips}
- H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 99/00: Subject matter not provided for in other groups of this subclass
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

Provided is a multilayer substrate obtained by laminating semiconductor substrates each having a trough electrode. The multilayer substrate has excellent conduction characteristics and can be manufactured at low cost. Conductive particles are each selectively present at a position where the through electrodes face each other as viewed in a plan view of the multilayer substrate. The multilayer substrate has a connection structure in which the facing through electrodes are connected by the conductive particles, and the semiconductor substrates each having the through electrode are bonded by an insulating adhesive.

## Claims

### Claim 1

A multilayer substrate comprising semiconductor substrates which each have a through electrode and are laminated to each other, wherein
conductive particles are each selectively present at a position where the through electrodes face each other as viewed in a plan view of the multilayer substrate, and
the multilayer substrate has a connection structure in which the facing through electrodes are connected by the conductive particles, and the semiconductor substrates each having the through electrode are bonded together by an insulating adhesive.

### Claim 2 (depends on 1)

The multilayer substrate according to claim 1, comprising a first semiconductor substrate having a through electrode and a second semiconductor substrate having a through electrode, the first and second semiconductor substrates being laminated together, the multilayer substrate having a connection structure in which
the through electrode of the first semiconductor substrate and the through electrode of the second semiconductor substrate are connected by the conductive particle which is selectively disposed between the through electrodes.

### Claim 3 (depends on 2)

The multilayer substrate according to claim 2, comprising a third semiconductor substrate having a through electrode laminated on the second semiconductor substrate, and having a connection structure in which
the through electrode of the second semiconductor substrate connected to the through electrode of the first semiconductor substrate and the through electrode of the third semiconductor substrate face each other, and are connected by a conductive particle which is selectively disposed between the through electrodes, and
the second and third semiconductor substrates are bonded by an insulating adhesive.

### Claim 4 (depends on 1)

The multilayer substrate according to claim 1, wherein a number of conductive particles which are not captured by the facing through electrodes between the first and second semiconductor substrates is 5% or less relative to a total number of the conductive particles present between the first and second semiconductor substrates.

### Claim 5 (depends on 1)

The multilayer substrate according to claim 1, comprising a heat sink in an outermost layer of the multilayer substrate, wherein the heat sink is connected to the through electrodes connected in a lamination direction of the multilayer substrate by connection with the conductive particle.

### Claim 6

A method for manufacturing a multilayer substrate in which through electrodes formed in semiconductor substrates are faced and joined each other, the method comprising: putting between the semiconductor substrates each having the through electrode an anisotropic conductive film in which conductive particles are selectively disposed in an insulating adhesive layer so as to each correspond to a position where the through electrodes face each other as viewed in a plan view of the multilayer substrate; and pressurizing the anisotropic conductive film under heating to achieve anisotropic conductive connection of the semiconductor substrates.

### Claim 7 (depends on 6)

The method for manufacturing a multilayer substrate according to claim 6, wherein a through electrode of a first semiconductor substrate having the through electrode and a through electrode of a second semiconductor substrate having the through electrode are faced and joined each other, the method comprising: putting between the first and second semiconductor substrates an anisotropic conductive film in which conductive particles are selectively disposed in an insulating adhesive layer so as to correspond to an arrangement of the through electrodes; and pressurizing the anisotropic conductive film under heating to achieve anisotropic conductive connection of the first and second semiconductor substrates.

### Claim 8 (depends on 6)

The method for manufacturing a multilayer substrate according to claim 6, wherein a third semiconductor substrate having a through electrode is laminated on the second semiconductor substrate, and an anisotropic conductive film in which conductive particles are selectively disposed in an insulating adhesive layer so as to correspond to the arrangement of the through electrodes is put between the through electrode of the second semiconductor substrate connected to the through electrode of the first semiconductor substrate under anisotropic conductive connection, and the through electrode of the third semiconductor substrate, and pressurized under heating, to achieve anisotropic conductive connection between the second and third semiconductor substrates.

### Claim 9

An anisotropic conductive film comprising an insulating adhesive layer and conductive particles disposed in the insulating adhesive layer, wherein the conductive particles are selectively disposed in the insulating adhesive layer so as to correspond to an arrangement of through electrodes connected by the anisotropic conductive film.

### Claim 10

An anisotropic conductive film comprising an insulating adhesive layer and conductive particles disposed in the insulating adhesive layer, wherein a conductive particle unit including three or more adjacent conductive particles is formed, and
in the conductive particle unit, a distance between any conductive particle and a conductive particle closest to the conductive particle is 0.2 to 0.5 times a particle diameter of the conductive particles.

### Claim 11 (depends on 10)

The anisotropic conductive film according to claim 10, wherein the conductive particle unit is disposed so as to correspond to an arrangement of through electrodes connected by the anisotropic conductive film.

### Claim 12 (depends on 9)

The anisotropic conductive film according to claim 9 wherein the conductive particle is a metal-coated resin particle.