# US 2018/0025999 A1 · Info package with integrated antennas or inductors > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2018/0025999 A1 - Document ID: US20180025999A1 - Status: Published application - Kind: A1 - Application number: 15/283,604 - Filed: 2016-10-03 - Published: 2018-01-25 - Earliest claimed: 2016-07-20 - Assignees: Taiwan Semiconductor Manufacturing Company, Ltd. - Applicants: Taiwan Semiconductor Manufacturing Company, Ltd. - Inventors: Chen-Hua Yu; Chuei-Tang Wang - Web page: https://patentgrep.com/patent/US20180025999A1 ## CPC - H10W 44/20: at high-frequency [HF] or radio frequency [RF] - H10W 20/40: Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes - H10W 44/501: {Inductive arrangements (H10W44/20 takes precedence)} - H10W 74/129: {forming a chip-scale package [CSP]} - H10W 44/248: {for antennas} - H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40) - H10W 72/0198: {batch processes} - H10W 72/241: {Dispositions, e.g. layouts} - H10W 72/874: {On different surfaces} - H10W 72/9413: {on encapsulations} - H10W 74/00: Encapsulations, e.g. protective coatings - H10W 90/00: Package configurations - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract In some embodiments, a semiconductor package includes a die surrounded by a molding material, a redistribution layer over the die and the molding material, the redistribution layer electrically coupled to the die, and a first conductive structure in the molding material and electrically coupled to the die, the first conductive structure being an inductor or an antenna. ## Claims ### Claim 1 A semiconductor package comprising: a die surrounded by a molding material; a redistribution layer over the die and the molding material, the redistribution layer electrically coupled to the die; and a first conductive structure in the molding material and electrically coupled to the die, the first conductive structure comprising an antenna, wherein at least a portion of a top edge of the antenna and at least a portion of a top edge of the die intersect a same plane parallel to a major plane of the molding material. ### Claim 2 (depends on 1) The semiconductor package of claim 1, wherein the first conductive structure is electrically coupled to the die via the redistribution layer. ### Claim 3 (depends on 2) The semiconductor package of claim 2, wherein the antenna comprises two conductive walls spaced apart with the molding material in between. ### Claim 4 (depends on 3) The semiconductor package of claim 3, wherein each of the two conductive walls comprises at least two segments that intersect. ### Claim 5 (depends on 3) The semiconductor package of claim 3, wherein the antenna is configured to receive an electromagnetic signal within a pre-determined frequency range. ### Claim 6 (depends on 5) The semiconductor package of claim 5, wherein the antenna is electrically coupled to an RF circuit of the die. ### Claim 7 (depends on 2) The semiconductor package of claim 2, further comprising an inductor, wherein the inductor comprises a metal band around a portion of the molding material. ### Claim 8 (depends on 7) The semiconductor package of claim 7, wherein the antenna is in the molding material and electrically coupled to the die, the antenna comprising two conductive walls with the molding material in between, the antenna configured to receive an electromagnetic signal within a pre-determined frequency range. ### Claim 9 (depends on 7) The semiconductor package of claim 7 wherein the inductor comprises a partially enclosed conductive wall. ### Claim 10 (depends on 7) The semiconductor package of claim 7, wherein the inductor comprises a solenoid, and wherein a center axis of the solenoid is substantially parallel to a major surface of the redistribution layer. ### Claim 11 (depends on 2) The semiconductor package of claim 2, further comprising an external connector over and electrically coupled to the redistribution layer. ### Claim 12 (depends on 11) The semiconductor package of claim 11, wherein the first conductive structure is electrically coupled to the external connector. ### Claim 13 A semiconductor package comprising: a first dielectric layer; a die attached to a first side of the first dielectric layer; a molding compound around the die and over the first side of the first dielectric layer; a first redistribution layer over the die and the molding compound, the first redistribution layer electrically coupled to the die; and a first conductive feature in the molding compound and between the first dielectric layer and the first redistribution layer, the first conductive feature comprising an antenna electrically coupled to the die, wherein the antenna comprises two non-overlapping metal walls in a top view, the two metal walls separated by the molding compound. ### Claim 14 (depends on 13) The semiconductor package of claim 13, further comprising an inductor, wherein the inductor comprises a metal band surrounding a portion of the molding compound. ### Claim 15 (depends on 14) The semiconductor package of claim 14, wherein inductor has an inductance between about 1 nanohenry (nH) to about 5 nH. ### Claim 16 (canceled) ### Claim 17 (depends on 13) The semiconductor package of claim 13, wherein the antenna is coupled to an RF module of the die. ### Claim 18 A method of forming a semiconductor package comprising: attaching a die to a first side of a first redistribution layer; forming a conductive feature on the first side of the first redistribution layer, the conductive feature comprising an antenna; forming a molding compound over the first side of the first redistribution layer, and around the die and the conductive feature; and forming a second redistribution layer over the die and the molding compound, the second redistribution layer electrically coupling the conductive feature to the die, wherein the second redistribution layer comprises a via extending through a dielectric layer, and at least a portion of a first interface between the dielectric layer and the antenna and at least a portion of a second interface between the via and the antenna intersect a same plane parallel to a major plane of the molding compound. ### Claim 19 (depends on 18) The method of claim 18, wherein the forming the conductive feature comprises forming two conductive walls over the first side of the first redistribution layer, the two conductive walls having a gap in between. ### Claim 20 (depends on 18) The method of claim 18, wherein the forming the conductive feature comprises forming a partially enclosed conductive wall over the first side of the first redistribution layer. ### Claim 21 (depends on 1) The semiconductor package of claim 1, wherein the top edge of the antenna and the top edge of the die are substantially flat.