# US 2018/0025971 A1 · Simultaneous formation of liner and metal conductor

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- Number: US 2018/0025971 A1
- Document ID: US20180025971A1
- Status: Published application
- Kind: A1
- Application number: 15/437,639
- Filed: 2017-02-21
- Published: 2018-01-25
- Earliest claimed: 2016-07-22
- Assignees: International Business Machines Corporation
- Applicants: International Business Machines Corporation
- Inventors: Daniel C Edelstein; Chih-Chao Yang
- Web page: https://patentgrep.com/patent/US20180025971A1

## CPC

- H10W 20/43: Layouts of interconnections
- H10W 20/059: {by reflowing or applying pressure}
- H10W 20/076: {in via holes or trenches}
- H10W 20/081: {by forming openings in the dielectric parts}
- H10W 20/096: {by contacting with gases, liquids or plasmas}
- H10W 20/425: {Barrier, adhesion or liner layers}
- H10W 20/4403: {based on metals, e.g. alloys, metal silicides (H10W20/4484 takes precedence)}
- H10W 20/4407: {Aluminium alloys}
- H10W 20/4437: {the principal metal being a transition metal}
- H10P 32/20: Diffusion for doping of insulating layers
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

An integrated circuit device having a substrate including a dielectric layer is patterned with a set of conductive line trenches. Each conductive line trench of the conductive line pattern having parallel vertical sidewalls and a horizontal bottom. A metal fills the set of conductive line trenches, wherein the metal fill is created by an anneal and reflow process. A liner which is an alloy of the metal and a selected element formed at interfaces of the metal layer and a surface of the dielectric, created simultaneously with the metal fill by the anneal and reflow process.

## Claims

### Claim 1

An integrated circuit device comprising:
a substrate including a dielectric layer patterned with a set of conductive line trenches, each conductive line trench of the conductive line pattern having parallel vertical sidewalls and a horizontal bottom;
a metal filling the set of conductive line trenches, wherein the metal fill is created by an anneal and reflow process; and
a liner which is an alloy of the metal and a selected element formed at interfaces of the metal layer and a surface of the dielectric, created simultaneously with the metal fill by the anneal and reflow process.

### Claim 2 (depends on 1)

The device as recited in claim 1 wherein the metal layer is comprised of aluminum and the selected element is nitrogen.

### Claim 3 (depends on 2)

The device as recited in claim 2, wherein the liner is comprised of an alloy selected from the group consisting of AlN and Al(N, Si).

### Claim 4 (depends on 1)

The device as recited in claim 1, wherein the metal fill is comprised of a metal selected from the group consisting of Al, Co, Ru, Ir, Rh, and Ni.

### Claim 5 (depends on 1)

The device as recited in claim 1, wherein the selected element is selected from the group consisting of N, Si, C, and O.

### Claim 6 (depends on 1)

The device as recited in claim 1, wherein the metal fill in the set of conductive lines trenches is coplanar with a top surface of the dielectric in field areas of the dielectric layer.

### Claim 7 (depends on 1)

The device as recited in claim 1 wherein the liner is comprised of an alloy AB wherein A is a metal selected from the group consisting of Al, Co, Ru, Ir, Rh, and Ni and B is a selected element selected from the group consisting of N, Si, C, and O.

### Claim 8

An integrated circuit device comprising:
a substrate including a dielectric layer patterned with a set of conductive line trenches, each conductive line trench having parallel vertical sidewalls and a horizontal bottom, wherein the vertical sidewalls and horizontal bottom have an element enriched surface layer in which the concentration of a selected element is increased relative to a remainder of the dielectric layer;
a metal filling the set of conductive line trenches; and
a liner which is an alloy of the metal and the selected element formed at interfaces of the metal layer and a surface of the dielectric.

### Claim 9 (depends on 8)

The device as recited in claim 8, wherein the liner which is an alloy of a first metal and the selected element is created simultaneously with the metal fill by an anneal and reflow process.

### Claim 10 (depends on 8)

The device as recited in claim 8, wherein the liner is formed in the element enriched surface layer of the dielectric layer.