# US 2018/0025941 A1 · Interconnect structure and fabrication thereof

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- Number: US 2018/0025941 A1
- Document ID: US20180025941A1
- Status: Published application
- Kind: A1
- Application number: 15/646,225
- Filed: 2017-07-11
- Published: 2018-01-25
- Earliest claimed: 2016-07-25
- Assignees: International Business Machines Corporation
- Applicants: International Business Machines Corporation
- Inventors: Chih-Chao Yang
- Web page: https://patentgrep.com/patent/US20180025941A1

## CPC

- H10P 52/403: {of conductive or resistive materials}
- H10W 20/033: {in openings in dielectrics}
- H10W 20/037: {the barrier, adhesion or liner layers being on top of a main fill metal}
- H10W 20/043: {for electroplating}
- H10W 20/047: {by introducing additional elements therein}
- H10W 20/0552: {by diffusing metallic dopants to react with dielectrics}
- H10W 20/076: {in via holes or trenches}
- H10W 20/081: {by forming openings in the dielectric parts}
- H10W 20/095: {by irradiating with electromagnetic or particle radiation (plasma treatment H10W20/096)}
- H10W 20/096: {by contacting with gases, liquids or plasmas}
- H10W 20/425: {Barrier, adhesion or liner layers}
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

Interconnect structures and processes generally include creating point defects in exposed surfaces of the dielectric layer to create a point defect region at a relatively shallow depth, wherein the point defect region is a fraction of the dielectric layer and is created with exposure to silicon, carbon, nitrogen, oxygen, or mixtures thereof such that the point defect region contains Si, C, N O, or mixtures containing at least one of the foregoing. A seed layer can be deposited and includes at least one alloying element that is effective to form an in situ self-aligned liner layer with the Si, C, N O, or mixtures containing at least one of the foregoing within the point defect region, which is formed at a depth of less than 10 nanometers. The in situ liner layer within the dielectric layer maximizes the volume fraction of the conductor of the interconnect structure.

## Claims

### Claim 1

An interconnect structure for an integrated circuit, comprising:
a patterned dielectric layer comprising at least one opening, the at least one opening including a bottom surface, and sidewalls extending from the bottom surface to a top surface, wherein the bottom surface is defined by a source region or a drain region or a metal gate or the dielectric layer;
an in situ liner layer formed within the dielectric layer;
a seed layer conformally deposited into the at least one opening of the patterned dielectric layer; and
a conductor layer overlaying the seed layer and filling the at least one opening;
wherein the in situ liner layer comprises a reaction byproduct of one or more of Si, C, N, O with an alloying element in the seed layer.

### Claim 2 (depends on 1)

The interconnect structure of claim 1, wherein the in situ liner layer has a thickness less than 10 nanometers.

### Claim 3 (depends on 1)

The interconnect structure of claim 1, wherein the in situ liner layer is formed in a point defect region within the dielectric layer.

### Claim 4 (depends on 1)

The interconnect structure of claim 1, wherein the in situ liner layer has a thickness greater than 0.5 to 3 nanometers.

### Claim 5

An interconnect structure for an integrated circuit, comprising:
a patterned dielectric layer comprising at least one opening, the at least one opening including a bottom surface, and sidewalls extending from the bottom surface to a top surface, wherein the bottom surface is defined by a source region or a drain region or a metal gate or the dielectric layer;
an in situ self-aligned liner layer formed within the dielectric layer;
a conformal liner layer deposited onto the in situ liner layer having a thickness less than 40 Angstroms;
a conformal seed layer on surfaces defined by the at least one opening of the patterned dielectric layer; and
a conductor layer overlaying the seed layer and filling the at least one opening;
wherein the in situ liner layer comprises a reaction byproduct of one or more of Si, C, N, O with an alloying element in the seed layer.

### Claim 6 (depends on 5)

The interconnect structure of claim 5, wherein the in situ liner layer has a thickness less than 10 nanometers and the conformal liner layer has a thickness of less than 15 Angstroms.

### Claim 7 (depends on 5)

The interconnect structure of claim 5, wherein the conformal liner layer comprises tantalum, ruthenium (Ru), rhodium, iridium, cobalt, or mixtures comprising at least one of the foregoing.