# US 2018/0025913 A1 · Semiconductor device and method for manufacturing the same

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- Number: US 2018/0025913 A1
- Document ID: US20180025913A1
- Status: Published application
- Kind: A1
- Application number: 15/654,110
- Filed: 2017-07-19
- Published: 2018-01-25
- Earliest claimed: 2016-07-25
- Assignees: Semiconductor Energy Laboratory Co., Ltd.
- Applicants: Semiconductor Energy Laboratory Co., Ltd.
- Inventors: Shunpei YAMAZAKI; Takashi HAMOCHI; Yasutaka NAKAZAWA; Masami JINTYOU; Yukinori SHIMA
- Web page: https://patentgrep.com/patent/US20180025913A1

## CPC

- H10D 64/0131: {the additional conductive layer comprising a silicide layer formed by the silicidation reaction between the layer of silicon with a metal layer which is not formed by metal implantation}
- H10B 12/315: {with the capacitor higher than a bit line}
- H10B 12/48: {Data lines or contacts therefor}
- H10D 30/6723: {having light shields}
- H10D 30/6729: {characterised by the electrodes}
- H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate}
- H10D 30/6757: {characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715)}
- H10D 64/0135: {by deposition of a layer, e.g. metal, metal compound or polysilicon, followed by transformation thereof into the insulator}
- H10D 64/62: Electrodes ohmically coupled to a semiconductor
- H10D 99/00: Subject matter not provided for in other groups of this subclass
- H10P 14/40: of conductive or resistive materials
- H10W 20/40: Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- C23F 1/38: for etching refractory metals
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10B: ELECTRONIC MEMORY DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- C23F: NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE (working metal by laser beams B23K26/00; desurfacing by applying flames B23K7/00; working of metal by electro-erosion B23H; producing decorative effects by removing surface material, e.g. by engraving, by etching, B44C1/22; electrolytic etching or polishing C25F); INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25

## Abstract

A semiconductor device with favorable electrical characteristics is provided. A source electrode and a drain electrode of a channel-etched transistor are each made to have a stacked-layer structure including a first conductive layer and a second conductive layer. A silicide that contains a metal element contained in the second conductive layer and nitrogen is formed to be in contact with a top surface and a side surface of the second conductive layer. Before etching of the first conductive layer, the silicide is formed by exposing the second conductive layer to an atmosphere containing silane, and plasma treatment is performed in a nitrogen atmosphere without exposure to the air.

## Claims

### Claim 1

A semiconductor device comprising:
a semiconductor layer; and
a first electrode and a second electrode each in contact with the semiconductor layer,
wherein:
the first electrode and the second electrode are spaced from each other,
the first electrode and the second electrode each comprise:
a first conductive layer in contact with a top surface of the semiconductor layer;
a second conductive layer over the first conductive layer;
a first layer covering a top surface of the second conductive layer; and
a second layer covering a side surface of the second conductive layer, and
the first layer and the second layer each contain a metal element contained in the second conductive layer, silicon, and nitrogen.

### Claim 2 (depends on 1)

The semiconductor device according to claim 1, wherein the second conductive layer has higher conductivity than the first conductive layer.

### Claim 3 (depends on 1)

The semiconductor device according to claim 1, wherein the second conductive layer has a lower melting point than the first conductive layer.

### Claim 4 (depends on 1)

The semiconductor device according to claim 1, wherein:
the metal element contained in the second conductive layer is capable of forming a silicide by reacting with silicon, and
the first layer and the second layer each contain the silicide.

### Claim 5 (depends on 1)

The semiconductor device according to claim 1, wherein:
the first conductive layer contains titanium or tungsten, and
the metal element contained in the second conductive layer is copper.

### Claim 6 (depends on 1)

The semiconductor device according to claim 1, wherein the semiconductor layer contains a metal oxide.

### Claim 7 (depends on 6)

The semiconductor device according to claim 6, wherein the metal oxide contains at least one of indium, zinc, and gallium.

### Claim 8

A method for manufacturing a semiconductor device, comprising:
forming a first conductive film over a semiconductor layer;
forming a second conductive film over the first conductive film;
performing first treatment to form a first layer on a top surface of the second conductive film;
etching the first layer and the second conductive film to expose a side surface of the second conductive film;
performing second treatment to form a second layer on the side surface of the second conductive film; and
etching the first conductive film to expose a side surface of the first conductive film and part of a top surface of the semiconductor layer,
wherein the first treatment and the second treatment each comprise exposing a surface of the second conductive film to an atmosphere containing silane and then performing plasma treatment in an atmosphere containing nitrogen.

### Claim 9 (depends on 8)

The method according to claim 8, further comprising:
performing third treatment between forming the second conductive film and performing the first treatment; and
performing fourth treatment between etching the first layer and the second conductive film and performing the second treatment,
wherein the third treatment and the fourth treatment each comprise removing an oxide film on the surface of the second conductive film.

### Claim 10 (depends on 9)

The method according to claim 9, wherein removing the oxide film is performed by plasma treatment in an atmosphere containing ammonia.

### Claim 11 (depends on 8)

The method according to claim 8, further comprising etching part of the top surface of the semiconductor layer with a solution containing an acid after etching the first conductive film.

### Claim 12 (depends on 8)

The method according to claim 8, wherein etching the first conductive film is performed by a wet etching method.

### Claim 13 (depends on 8)

The method according to claim 8, wherein:
the first conductive film contains titanium or tungsten, and
the second conductive film contains copper.

### Claim 14

A method for manufacturing a semiconductor device, comprising:
forming a first conductive film over a semiconductor layer;
forming a second conductive film over the first conductive film;
etching the second conductive film to expose a side surface of the second conductive film;
performing first treatment to form a first layer on a top surface of the second conductive film and a second layer on the side surface of the second conductive film; and
etching the first conductive film,
wherein the first treatment comprises exposing a surface of the second conductive film to an atmosphere containing silane and then performing plasma treatment in an atmosphere containing nitrogen.

### Claim 15 (depends on 14)

The method according to claim 14, further comprising performing second treatment between etching the second conductive film and performing the first treatment,
wherein the second treatment comprises removing an oxide film on the surface of the second conductive film.

### Claim 16 (depends on 15)

The method according to claim 15, wherein removing the oxide film is performed by plasma treatment in an atmosphere containing ammonia.

### Claim 17 (depends on 14)

The method according to claim 14, further comprising etching part of a top surface of the semiconductor layer with a solution containing an acid after etching the first conductive film.

### Claim 18 (depends on 14)

The method according to claim 14, wherein etching the first conductive film is performed by a wet etching method.

### Claim 19 (depends on 14)

The method according to claim 14, wherein:
the first conductive film contains titanium or tungsten, and
the second conductive film contains copper.